SN74LXC8T245

現行

具有可配置電平移位變化和三態輸出的 8 位元雙電源供電匯流排收發器

產品詳細資料

Technology family LXC Applications GPIO, JTAG, SPI, UART Bits (#) 8 High input voltage (min) (V) 0.44 High input voltage (max) (V) 5.5 Vout (min) (V) 1.1 Vout (max) (V) 5.5 Data rate (max) (Mbps) 420 IOH (max) (mA) -32 IOL (max) (mA) 32 Supply current (max) (µA) 12 Features Integrated pulldown resistors, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc disconnect, Vcc isolation Input type Schmitt-Trigger Output type 3-State Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LXC Applications GPIO, JTAG, SPI, UART Bits (#) 8 High input voltage (min) (V) 0.44 High input voltage (max) (V) 5.5 Vout (min) (V) 1.1 Vout (max) (V) 5.5 Data rate (max) (Mbps) 420 IOH (max) (mA) -32 IOL (max) (mA) 32 Supply current (max) (µA) 12 Features Integrated pulldown resistors, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc disconnect, Vcc isolation Input type Schmitt-Trigger Output type 3-State Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 24 49.92 mm² 7.8 x 6.4 VQFN (RHL) 24 19.25 mm² 5.5 x 3.5 VSSOP (DGS) 24 29.89 mm² 6.1 x 4.9
  • Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
  • Robust, glitch-free power supply sequencing
  • Up to 420-Mbps support for 3.3 V to 5.0 V
  • Schmitt-trigger inputs allow for slow or noisy inputs
  • I/Os with integrated dynamic pull-down resistors help reduce external component count
  • Control inputs with integrated static pull-down resistors allow for floating control inputs
  • High drive strength (up to 32 mA at 5 V)
  • Low power consumption:
    • 4-µA maximum (25°C)
    • 12-µA maximum (–40°C to 125°C)
  • VCC isolation and Vcc disconnect (Ioff-float) feature
    • If either VCC supply is < 100 mV or disconnected, all I/Os get pulled-down and then become high-impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with LVC family level shifters
  • Control logic (DIR and OE) are referenced to VCCA
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 4000-V Human-Body Model
    • 1000-V Charged-Device Model
  • Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
  • Robust, glitch-free power supply sequencing
  • Up to 420-Mbps support for 3.3 V to 5.0 V
  • Schmitt-trigger inputs allow for slow or noisy inputs
  • I/Os with integrated dynamic pull-down resistors help reduce external component count
  • Control inputs with integrated static pull-down resistors allow for floating control inputs
  • High drive strength (up to 32 mA at 5 V)
  • Low power consumption:
    • 4-µA maximum (25°C)
    • 12-µA maximum (–40°C to 125°C)
  • VCC isolation and Vcc disconnect (Ioff-float) feature
    • If either VCC supply is < 100 mV or disconnected, all I/Os get pulled-down and then become high-impedance
  • Ioff supports partial-power-down mode operation
  • Compatible with LVC family level shifters
  • Control logic (DIR and OE) are referenced to VCCA
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 4000-V Human-Body Model
    • 1000-V Charged-Device Model

The SN74LXC8T245 is an 8-bit, dual-supply noninverting bidirectional voltage level translation device. Ax pins and control pins (DIR and OE) are referenced to VCCA logic levels, and Bx pins are referenced to VCCB logic levels. The A port is able to accept I/O voltages ranging from 1.1 V to 5.5 V, while the B port can accept I/O voltages from 1.1 V to 5.5 V. A high on DIR allows data transmission from A to B and a low on DIR allows data transmission from B to A when OE is set to low. When OE is set to high, both Ax and Bx pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

The SN74LXC8T245 is an 8-bit, dual-supply noninverting bidirectional voltage level translation device. Ax pins and control pins (DIR and OE) are referenced to VCCA logic levels, and Bx pins are referenced to VCCB logic levels. The A port is able to accept I/O voltages ranging from 1.1 V to 5.5 V, while the B port can accept I/O voltages from 1.1 V to 5.5 V. A high on DIR allows data transmission from A to B and a low on DIR allows data transmission from B to A when OE is set to low. When OE is set to high, both Ax and Bx pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

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技術文件

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類型 標題 日期
* Data sheet SN74LXC8T245 8-bit Dual-Supply Bus Transceiver with Configurable Level Shifting and 3-State Outputs datasheet (Rev. A) PDF | HTML 2023年 3月 14日
Application note Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2024年 10月 2日
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024年 7月 12日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Application brief Enabling Power-Efficient FPGA Designs With Level Translation PDF | HTML 2024年 4月 30日
EVM User's guide TXV010xEVM Evaluation Module User's Guide PDF | HTML 2024年 2月 5日
Product overview Enabling System on Module Industrial PC Connectivity With Level Translation PDF | HTML 2023年 4月 3日
Application brief Enabling Next Generation Processors, FPGA, and ASSP with Voltage Level Translat PDF | HTML 2023年 1月 17日
Application brief Enabling Smart Solar Inverter Designs with Level Translation PDF | HTML 2022年 10月 31日
Application brief Enabling LED and LCD Indicators in Modern System Designs PDF | HTML 2022年 8月 1日
Application brief Translate Voltages for RGMII (Rev. A) PDF | HTML 2021年 8月 6日
Application brief Bringing Together 5G Signal Chains With Level Translation PDF | HTML 2021年 3月 5日
Application note Translate Voltages for GPIO PDF | HTML 2020年 8月 4日

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模擬型號

SN74LXC8T245 IBIS model

SCEM785.ZIP (57 KB) - IBIS Model
封裝 針腳 CAD 符號、佔位空間與 3D 模型
TSSOP (PW) 24 Ultra Librarian
VQFN (RHL) 24 Ultra Librarian
VSSOP (DGS) 24 Ultra Librarian

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  • 認證摘要
  • 進行中持續性的可靠性監測
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