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邏輯和電壓轉換
電壓轉換器及電平移位器
自動方向電壓轉換器

TXS0102

現行

適用開汲極和推拉式應用的 2 位元雙向電壓位準移位器

立即訂購
產品規格表

TXS0102

現行
產品規格表 立即訂購

產品詳細資料

Technology family TXS Applications I2C, MDIO Bits (#) 2 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 10 Features Edge rate accelerator, Output enable, Partial power down (Ioff), Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 85
Technology family TXS Applications I2C, MDIO Bits (#) 2 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 10 Features Edge rate accelerator, Output enable, Partial power down (Ioff), Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YZP) 8 2.8125 mm² 2.25 x 1.25 SSOP (DCT) 8 11.8 mm² 2.95 x 4 VSSOP (DCU) 8 6.2 mm² 2 x 3.1 X2SON (DQE) 8 1.4 mm² 1.4 x 1 X2SON (DQM) 8 2.16 mm² 1.8 x 1.2
  • No direction-control signal needed
  • Maximum data rates:
    • 24 Mbps (push pull)
    • 2 Mbps (open drain)
  • Available in the Texas Instruments NanoStar™ integrated circuit package
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (V CCA ≤ V CCB)
  • V CC isolation feature: if either V CC input is at GND, both ports are in the High-Impedance state
  • No power-supply sequencing required: either V CCA or V CCB can be ramped first
  • I off supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • A port:
      • 2500-V Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
    • B port:
      • 8-kV Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
  • No direction-control signal needed
  • Maximum data rates:
    • 24 Mbps (push pull)
    • 2 Mbps (open drain)
  • Available in the Texas Instruments NanoStar™ integrated circuit package
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (V CCA ≤ V CCB)
  • V CC isolation feature: if either V CC input is at GND, both ports are in the High-Impedance state
  • No power-supply sequencing required: either V CCA or V CCB can be ramped first
  • I off supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • A port:
      • 2500-V Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
    • B port:
      • 8-kV Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)

This two-bit non-inverting translator is a bidirectional voltage-level translator and can be used to establish digital switching compatibility between mixed-voltage systems. It uses two separate configurable power-supply rails, with the A ports supporting operating voltages from 1.65 V to 3.6 V while it tracks the V CCA supply, and the B ports supporting operating voltages from 2.3 V to 5.5 V while it tracks the V CCB supply. This allows the support of both lower and higher logic signal levels while providing bidirectional translation capabilities between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all I/Os are placed in the high-impedance state, which significantly reduces the power-supply quiescent current consumption.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

This two-bit non-inverting translator is a bidirectional voltage-level translator and can be used to establish digital switching compatibility between mixed-voltage systems. It uses two separate configurable power-supply rails, with the A ports supporting operating voltages from 1.65 V to 3.6 V while it tracks the V CCA supply, and the B ports supporting operating voltages from 2.3 V to 5.5 V while it tracks the V CCB supply. This allows the support of both lower and higher logic signal levels while providing bidirectional translation capabilities between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all I/Os are placed in the high-impedance state, which significantly reduces the power-supply quiescent current consumption.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
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TXS0104E 現行 適用開汲極和推拉式應用的四位元雙向電壓位準移位器 Same function for 4-channel voltage translator

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類型 標題 日期
* Data sheet TXS0102 2-Bit Bidirectional Voltage-Level Translator for Open-Drain and Push-Pull Applications datasheet (Rev. J) PDF | HTML 2023年 7月 25日
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024年 7月 12日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Application brief Integrated vs. Discrete Open Drain Level Translation PDF | HTML 2024年 1月 9日
Application note Leveraging Edge Rate Accelerators with Auto-Sensing Level Shifters PDF | HTML 2023年 9月 29日
Application brief Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages PDF | HTML 2023年 9月 5日
Application note Do’s and Don’ts for TXB and TXS Voltage Level-Shifters with Edge Rate Accelerato PDF | HTML 2023年 6月 28日
Product overview Enabling System on Module Industrial PC Connectivity With Level Translation PDF | HTML 2023年 4月 3日
Application brief Enabling Next Generation Processors, FPGA, and ASSP with Voltage Level Translat PDF | HTML 2023年 1月 17日
Application brief Enabling Smart Solar Inverter Designs with Level Translation PDF | HTML 2022年 10月 31日
Product overview Translate Voltages for I2C for PCA9306 LSF0102 TXS0102 PDF | HTML 2022年 9月 14日
Product overview Translate Voltages for I2C PDF | HTML 2022年 6月 2日
Application brief Translate Voltages for MDIO PDF | HTML 2021年 7月 16日
EVM User's guide TXS-EVM User's Guide (Rev. B) PDF | HTML 2021年 6月 8日
Selection guide Voltage Translation Buying Guide (Rev. A) 2021年 4月 15日
Technical article How smart thermostats get their degrees PDF | HTML 2020年 3月 9日
Application note Effects of pullup and pulldown resistors on TXS and TXB devices (Rev. A) 2018年 3月 28日
Application note Factors Affecting VOL for TXS and LSF Auto-bidirectional Translation Devices 2017年 11月 19日
Application note Biasing Requirements for TXS, TXB, and LSF Auto-Bidirectional Translators 2017年 10月 30日
Application note A Guide to Voltage Translation With TXS-Type Translators 2010年 6月 29日

設計與開發

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開發板

5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組

靈活的 EVM 旨在支援任何針腳數為 5 至 8 支且採用 DCK、DCT、DCU、DRL 或 DBV 封裝的裝置。
使用指南: PDF
TI.com 無法提供
開發板

TXS-EVM — 適用於單通道、雙通道、四通道和八通道裝置的轉換器系列評估模組

TXS-EVM 旨在支援單通道、雙通道、四通道和八通道 TXS 裝置。TXS 產品屬於自動雙向電壓位準轉換系列，運作電壓介於 1.2V 與 5.5 V，旨在支援不同產業中的各種通用電壓位準轉換應用。

使用指南: PDF | HTML
TI.com 無法提供

許多 TI 參考設計包含 TXS0102

使用我們的參考設計選擇工具，以檢視並找出最適合您的應用和參數的設計。

檢視參考設計
封裝 針腳 CAD 符號、佔位空間與 3D 模型
DSBGA (YZP) 8 Ultra Librarian
SSOP (DCT) 8 Ultra Librarian
VSSOP (DCU) 8 Ultra Librarian
X2SON (DQE) 8 Ultra Librarian
X2SON (DQM) 8 Ultra Librarian
適用 TI 的評估品項標準條款與條件。

訂購與品質

內含資訊：
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

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