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電壓轉換器及電平移位器
電壓轉換器

TXS0104V

現行

適用於汲極斷路和推拉應用的四位元雙向位準移位器

立即訂購
產品規格表

TXS0104V

現行
產品規格表 立即訂購

產品詳細資料

Bits (#) 4 Data rate (max) (Mbps) 24 Topology Open drain, Push-Pull Direction control (typ) Auto-direction Vin (min) (V) 1.65 Vin (max) (V) 3.6 Vout (min) (V) 2.3 Vout (max) (V) 5.5 Applications GPIO, I2C, JTAG, MDIO, SDIO, SMBus, SPI, UART Features Edge rate accelerator, Output enable Prop delay (ns) 120 Technology family TXS Supply current (max) (mA) 0.025 Rating Catalog Operating temperature range (°C) -40 to 85
Bits (#) 4 Data rate (max) (Mbps) 24 Topology Open drain, Push-Pull Direction control (typ) Auto-direction Vin (min) (V) 1.65 Vin (max) (V) 3.6 Vout (min) (V) 2.3 Vout (max) (V) 5.5 Applications GPIO, I2C, JTAG, MDIO, SDIO, SMBus, SPI, UART Features Edge rate accelerator, Output enable Prop delay (ns) 120 Technology family TXS Supply current (max) (mA) 0.025 Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 14 51.9 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4 UQFN (RUT) 12 3.4 mm² 2 x 1.7 VQFN (RGY) 14 12.25 mm² 3.5 x 3.5 WQFN (BQA) 14 7.5 mm² 3 x 2.5
  • No direction-control signal needed
  • Maximum data rates:
    • 24Mbps (push pull)
    • 2Mbps (open drain)
  • 1.65V to 3.6V on A port and 2.3V to 5.5V on B port (VCCA ≤ VCCB)
  • No power-supply sequencing required – VCCA or VCCB can be ramped first
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22:
    • A port:
      • 2000V Human-Body Model (A114-B)
      • 500V Charged-Device Model (C101)
    • B port:
      • 5000V Human-Body Model (A114-B)
      • 500V Charged-Device Model (C101)
  • No direction-control signal needed
  • Maximum data rates:
    • 24Mbps (push pull)
    • 2Mbps (open drain)
  • 1.65V to 3.6V on A port and 2.3V to 5.5V on B port (VCCA ≤ VCCB)
  • No power-supply sequencing required – VCCA or VCCB can be ramped first
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22:
    • A port:
      • 2000V Human-Body Model (A114-B)
      • 500V Charged-Device Model (C101)
    • B port:
      • 5000V Human-Body Model (A114-B)
      • 500V Charged-Device Model (C101)

This 4-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65V to 3.6V. VCCA must be less than or equal to VCCB. The B port is designed to track VCCB. VCCB accepts any supply voltage from 2.3V to 5.5V. This allows for low-voltage bidirectional translation between any of the 1.8V, 2.5V, 3.3V, and 5V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0104V is designed so that the OE input circuit is supplied by VCCA.

For the high-impedance state during power up or power down, tie OE to GND through a pull-down resistor; the current-sourcing capability of the driver determines the minimum value of the resistor.

This 4-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65V to 3.6V. VCCA must be less than or equal to VCCB. The B port is designed to track VCCB. VCCB accepts any supply voltage from 2.3V to 5.5V. This allows for low-voltage bidirectional translation between any of the 1.8V, 2.5V, 3.3V, and 5V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXS0104V is designed so that the OE input circuit is supplied by VCCA.

For the high-impedance state during power up or power down, tie OE to GND through a pull-down resistor; the current-sourcing capability of the driver determines the minimum value of the resistor.
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* Data sheet TXS0104V 4-Bit Bi-directional, Level-Shifting, Voltage Translator for Open-Drain and Push-Pull Applications datasheet PDF | HTML 2024年 6月 14日

設計與開發

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開發板

14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組

14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。

使用指南: PDF | HTML
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開發板

14-24-NL-LOGIC-EVM — 適用於 14 針腳至 24 針腳無引線封裝的邏輯產品通用評估模組

14-24-NL-LOGIC-EVM 是一款靈活的評估模組 (EVM)，設計用於支援任何具有 14 針腳至 24 針腳 BQA、BQB、RGY、RSV、RJW 或 RHL 封裝的邏輯或轉換裝置。

使用指南: PDF | HTML
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參考設計

TIDA-00403 — 使用 TLV320AIC3268 miniDSP 轉碼器的超音波距離量測參考設計

The TIDA-00403 reference design uses off-the-shelf EVMs for ultrasonic distance measurement solutions using algorithms within the TLV320AIC3268 miniDSP. In conjunction with TI’s PurePath Studio design suite, a robust and user configurable ultrasonic distance measurement system can be designed (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
UQFN (RUT) 12 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian
WQFN (BQA) 14 Ultra Librarian
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  • 產品標記
  • 鉛塗層/球物料
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  • 材料內容
  • 認證摘要
  • 進行中的可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

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