TXU0202-Q1
- Fully configurable dual-rail design allows each port to operate from 1.1 V to 5.5 V
- Up to 200 Mbps support for 3.3 V to 5.0 V
- Schmitt-trigger inputs allows for slow and noisy inputs
- Inputs with integrated static pull-down resistors prevent channels from floating
- High drive strength (up to 12 mA at 5 V)
- Low power consumption
- 2.5 µA maximum (25°C)
- 6 µA maximum (–40°C to 125°C)
- VCC isolation and VCC disconnect (Ioff-float) feature
- If either VCC input is ;amplt;100 mV or disconnected, all outputs are disabled and become high-impedance
- Ioff supports partial-power-down mode operation
- Control logic (OE) with VCC(MIN) circuitry allows for control from either A or B port
- Pinout compatible with TXB family level shifters
- Available in another variant that supports common applications: TXU0102
- Operating temperature from –40°C to +125°C
- Latch-up performance exceeds 100 mA per JESD 78, class II
- ESD protection exceeds JESD 22
- 2500-V human-body model
- 1500-V charged-device model
TXU0202-Q1 is a 2-bit, dual-supply noninverting fixed direction voltage level translation device. The Ax pins are referenced to VCCA logic level, the OE pin can be referenced to either VCCA or VCCB logic levels, and the Bx pins are referenced to VCCB logic levels. The A port can accept input voltages ranging from 1.1 V to 5.5 V, while the B port can also accept input voltages from 1.1 V to 5.5 V. Fixed direction data transmission can occur from A to B or B to A when OE is set to high in reference to either supply. When OE is set to low, all output pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TXU0202-Q1 Single-Bit Fixed Direction Voltage-Level TranslatorWith Schmitt-Trigger Inputs and 3-State Outputs datasheet | PDF | HTML | 2022年 1月 10日 |
Application note | Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators | PDF | HTML | 2024年 10月 2日 | |
Application note | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 2024年 7月 12日 | |
Application note | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024年 7月 3日 | |
Functional safety information | TXU0202-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA | PDF | HTML | 2024年 2月 7日 | |
Application brief | Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages | PDF | HTML | 2023年 9月 5日 | |
Application brief | Enabling Next Generation ADAS Domain Controllers with Voltage Translation | PDF | HTML | 2022年 10月 13日 |
設計與開發
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5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組
5-8-NL-LOGIC-EVM — 支援 5 至 8 針腳 DPW、DQE、DRY、DSF、DTM、DTQ 和 DTT 封裝的通用邏輯和轉譯 EVM
支援任何具 DTT、DRY、DPW、DTM、DQE、DQM、DSF 或 DTQ 封裝的邏輯或轉換裝置之通用 EVM。可實現靈活評估的電路板設計。
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
VSSOP (DCU) | 8 | Ultra Librarian |
X1QFN (DTT) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點