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UCC27526

現行

具 5-V UVLO、啟用功能和雙 TTL 輸入的 5-A/5-A 雙通道閘極驅動器

現在提供此產品的更新版本

open-in-new 比較替代產品
功能相同,但引腳輸出與所比較的裝置不同
UCC27624 現行 具 4V UVLO、30V VDD 和低傳播延遲的 5A/5A 雙通道閘極驅動器 This is a newer dual channel low-side driver with improved noise and transient handling.

產品詳細資料

Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Flexible Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Flexible
Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Flexible Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Flexible
WSON (DSD) 8 9 mm² 3 x 3
  • Industry-standard pinout
  • Two independent gate-drive channels
  • 5A peak source and sink-drive current
  • Independent-enable function for each output
  • TTL and CMOS compatible logic threshold independent of supply voltage
  • Hysteretic-logic thresholds for high noise immunity
  • Inputs and enable pin-voltage levels not restricted by VDD pin bias supply voltage
  • 4.5V to 18V single-supply range
  • Outputs held low during VDD-UVLO, (ensures glitch-free operation at power up and power down)
  • Fast propagation delays (13ns typical)
  • Fast rise and fall times (7ns and 6ns typical)
  • 1ns typical delay matching between two channels
  • Two outputs are in parallel for higher drive current
  • Outputs held low when inputs floating
  • PDIP (8), SOIC (8), MSOP (8) PowerPAD™ and 3mm × 3mm WSON-8 package options
  • Operating temperature range of –40°C to 140°C
  • Industry-standard pinout
  • Two independent gate-drive channels
  • 5A peak source and sink-drive current
  • Independent-enable function for each output
  • TTL and CMOS compatible logic threshold independent of supply voltage
  • Hysteretic-logic thresholds for high noise immunity
  • Inputs and enable pin-voltage levels not restricted by VDD pin bias supply voltage
  • 4.5V to 18V single-supply range
  • Outputs held low during VDD-UVLO, (ensures glitch-free operation at power up and power down)
  • Fast propagation delays (13ns typical)
  • Fast rise and fall times (7ns and 6ns typical)
  • 1ns typical delay matching between two channels
  • Two outputs are in parallel for higher drive current
  • Outputs held low when inputs floating
  • PDIP (8), SOIC (8), MSOP (8) PowerPAD™ and 3mm × 3mm WSON-8 package options
  • Operating temperature range of –40°C to 140°C

The UCC2752x family of devices are dual-channel, high-speed, low-side gate-driver devices capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC2752x can deliver high-peak current pulses of up to 5A source and 5A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay (typically 13ns). In addition, the drivers feature matched internal propagation delays between the two channels. These delays are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with one input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC2752x family provides the combination of three standard logic options — dual inverting, dual noninverting, one inverting and one noninverting driver. The UCC27526 features a dual input design which offers flexibility of both inverting (IN– pin) and non-inverting (IN+ pin) configuration for each channel. Either IN+ or IN– pin controls the state of the driver output. The unused input pin is used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins of all the devices in UCC2752x family ensure that outputs are held LOW when input pins are in floating condition. The UCC27523 and UCC27525 devices feature Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.

The UCC2752x family of devices are available in SOIC-8 (D), MSOP-8 with exposed pad (DGN) and 3mm × 3mm WSON-8 with exposed pad (DSD) packages. The UCC27526 is only offered in a 3mm × 3mm WSON (DSD) package.

The UCC2752x family of devices are dual-channel, high-speed, low-side gate-driver devices capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC2752x can deliver high-peak current pulses of up to 5A source and 5A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay (typically 13ns). In addition, the drivers feature matched internal propagation delays between the two channels. These delays are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with one input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC2752x family provides the combination of three standard logic options — dual inverting, dual noninverting, one inverting and one noninverting driver. The UCC27526 features a dual input design which offers flexibility of both inverting (IN– pin) and non-inverting (IN+ pin) configuration for each channel. Either IN+ or IN– pin controls the state of the driver output. The unused input pin is used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins of all the devices in UCC2752x family ensure that outputs are held LOW when input pins are in floating condition. The UCC27523 and UCC27525 devices feature Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.

The UCC2752x family of devices are available in SOIC-8 (D), MSOP-8 with exposed pad (DGN) and 3mm × 3mm WSON-8 with exposed pad (DSD) packages. The UCC27526 is only offered in a 3mm × 3mm WSON (DSD) package.

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類型 標題 日期
* Data sheet UCC2752x Dual 5A High-Speed, Low-Side Gate Drivers datasheet (Rev. H) PDF | HTML 2024年 6月 14日
Application note Why use a Gate Drive Transformer? PDF | HTML 2024年 3月 4日
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 2024年 1月 22日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
Application note Improving Efficiency of DC-DC Conversion through Layout 2019年 5月 7日
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 2019年 1月 18日
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 2018年 10月 29日
Selection guide Power Management Guide 2018 (Rev. R) 2018年 6月 25日
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 2018年 3月 16日

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模擬型號

UCC27526 PSpice Transient Model

SLUM298.ZIP (50 KB) - PSpice Model
模擬型號

UCC27526 Unencrypted PSpice Transient Model

SLUM478.ZIP (2 KB) - PSpice Model
計算工具

SLURB22 UCC2752X Schematic Review Template

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產品
低壓側驅動器
UCC27523 具有 5-V UVLO、反相輸入及賦能的 5-A/5-A 雙通道閘極驅動器 UCC27524 具有 5V UVLO、賦能和 1-ns 延遲匹配的 5-A/5-A 雙通道閘極驅動器 UCC27524A 具有 5-V UVLO、啟用和負輸入電壓處理功能的 5-A/5-A 雙通道閘極驅動器 UCC27524A-Q1 具有 5-V UVLO 和負輸入電壓處理功能的汽車 5-A/5-A 雙通道閘極驅動器 UCC27524A1-Q1 具有 5-V UVLO 和負輸入電壓處理功能的汽車 5-A/5-A 雙通道閘極驅動器 UCC27525 具有 5-V UVLO、賦能及反相/非反相輸入的 5-A/5-A 雙通道閘極驅動器 UCC27526 具 5-V UVLO、啟用功能和雙 TTL 輸入的 5-A/5-A 雙通道閘極驅動器 UCC27527 具 5-V UVLO、啟用功能和雙 CMOS 輸入的 5-A/5-A 雙通道閘極驅動器 UCC27528 具 5-V UVLO、CMOS 輸入及啟用功能的 5-A/5-A 雙通道閘極驅動器 UCC27528-Q1 具 5-V UVLO 與 CMOS 輸入的車用 5-A/5-A 雙通道閘極驅動器
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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