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低壓側驅動器

UCC27528-Q1

現行

具 5-V UVLO 與 CMOS 輸入的車用 5-A/5-A 雙通道閘極驅動器

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產品規格表

UCC27528-Q1

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Negative Voltage Handling on Input Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.017 Input threshold CMOS Channel input logic Dual, Non-Inverting Input negative voltage (V) -5 Rating Automotive Undervoltage lockout (typ) (V) 4 Driver configuration Dual, Non-Inverting
Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Negative Voltage Handling on Input Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.017 Input threshold CMOS Channel input logic Dual, Non-Inverting Input negative voltage (V) -5 Rating Automotive Undervoltage lockout (typ) (V) 4 Driver configuration Dual, Non-Inverting
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Qualified for Automotive Applications
  • AEC-Q100 Device Temperature Grade 1
  • Industry-Standard Pin Out
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink Drive Current
  • CMOS Input Logic Threshold
    (Function of Supply Voltage on VDD Pins)
  • Hysteretic Logic Thresholds for High Noise
    Immunity
  • Independent Enable Function for Each Output
  • Inputs and Enable Pin Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • 4.5-V to 18-V Single Supply Range
  • Outputs Held Low During VDD UVLO (Ensures
    Glitch-Free Operation at Power Up and Power
    Down)
  • Fast Propagation Delays (17-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between 2 Channels
  • Outputs Held in Low When Inputs Floating
  • SOIC-8 Package
  • Operating Temperature Range of –40°C to 140°C
  • –5-V Negative Voltage Handling Capability on
    Input Pins
  • Qualified for Automotive Applications
  • AEC-Q100 Device Temperature Grade 1
  • Industry-Standard Pin Out
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink Drive Current
  • CMOS Input Logic Threshold
    (Function of Supply Voltage on VDD Pins)
  • Hysteretic Logic Thresholds for High Noise
    Immunity
  • Independent Enable Function for Each Output
  • Inputs and Enable Pin Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • 4.5-V to 18-V Single Supply Range
  • Outputs Held Low During VDD UVLO (Ensures
    Glitch-Free Operation at Power Up and Power
    Down)
  • Fast Propagation Delays (17-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between 2 Channels
  • Outputs Held in Low When Inputs Floating
  • SOIC-8 Package
  • Operating Temperature Range of –40°C to 140°C
  • –5-V Negative Voltage Handling Capability on
    Input Pins

The UCC27528-Q1 device is a dual-channel, high-speed, low-side gate driver capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27528-Q1 device can deliver high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay of 17 ns (typical). In addition, the drivers feature matched internal propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. The input pin thresholds are based on CMOS logic, which is a function of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity. The enable pins are based on TTL and CMOS compatible logic, independent of the VDD supply voltage.

The UCC27528-Q1 device is a dual noninverting driver. Internal pullup and pulldown resistors on the input pins of the UCC27528-Q1 device ensure that outputs are held low when input pins are in floating condition. The UCC27528-Q1 device features enable pins (ENA and ENB) for better control of the operation of the driver applications. The pins are internally pulled up to the VDD supply for active-high logic and can be left open for standard operation.

The UCC27528-Q1 device is a dual-channel, high-speed, low-side gate driver capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, the UCC27528-Q1 device can deliver high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay of 17 ns (typical). In addition, the drivers feature matched internal propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. The input pin thresholds are based on CMOS logic, which is a function of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity. The enable pins are based on TTL and CMOS compatible logic, independent of the VDD supply voltage.

The UCC27528-Q1 device is a dual noninverting driver. Internal pullup and pulldown resistors on the input pins of the UCC27528-Q1 device ensure that outputs are held low when input pins are in floating condition. The UCC27528-Q1 device features enable pins (ENA and ENB) for better control of the operation of the driver applications. The pins are internally pulled up to the VDD supply for active-high logic and can be left open for standard operation.
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類型 標題 日期
* Data sheet UCC27528-Q1 Dual 5-A High-Speed Low-Side Gate Driver Based on CMOS Input Threshold Logic datasheet (Rev. A) PDF | HTML 2015年 5月 7日
Application note Why use a Gate Drive Transformer? PDF | HTML 2024年 3月 4日
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 2024年 1月 22日
Application note Static Magnet Power Supply Design for Magnetic Resonance Imaging Application PDF | HTML 2024年 1月 22日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
Application note Improving Efficiency of DC-DC Conversion through Layout 2019年 5月 7日
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 2019年 1月 18日
Application brief High-Side Cutoff Switches for High-Power Automotive Applications (Rev. A) 2018年 11月 26日
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 2018年 10月 29日
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 2018年 3月 16日

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UCC27528 PSpice Transient Model

SLUM344.ZIP (49 KB) - PSpice Model
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UCC27528 Unencrypted PSpice Transient Model

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低壓側驅動器
UCC27523 — 具有 5-V UVLO、反相輸入及賦能的 5-A/5-A 雙通道閘極驅動器 UCC27524 — 具有 5V UVLO、賦能和 1-ns 延遲匹配的 5-A/5-A 雙通道閘極驅動器 UCC27524A — 具有 5-V UVLO、啟用和負輸入電壓處理功能的 5-A/5-A 雙通道閘極驅動器 UCC27524A-Q1 — 具有 5-V UVLO 和負輸入電壓處理功能的汽車 5-A/5-A 雙通道閘極驅動器 UCC27524A1-Q1 — 具有 5-V UVLO 和負輸入電壓處理功能的汽車 5-A/5-A 雙通道閘極驅動器 UCC27525 — 具有 5-V UVLO、賦能及反相/非反相輸入的 5-A/5-A 雙通道閘極驅動器 UCC27526 — 具 5-V UVLO、啟用功能和雙 TTL 輸入的 5-A/5-A 雙通道閘極驅動器 UCC27527 — 具 5-V UVLO、啟用功能和雙 CMOS 輸入的 5-A/5-A 雙通道閘極驅動器 UCC27528 — 具 5-V UVLO、CMOS 輸入及啟用功能的 5-A/5-A 雙通道閘極驅動器 UCC27528-Q1 — 具 5-V UVLO 與 CMOS 輸入的車用 5-A/5-A 雙通道閘極驅動器
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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