SBAA275A June 2018 – March 2023 ADS1120 , ADS112C04 , ADS112U04 , ADS1147 , ADS1148 , ADS114S06 , ADS114S06B , ADS114S08 , ADS114S08B , ADS1220 , ADS122C04 , ADS122U04 , ADS1247 , ADS1248 , ADS124S06 , ADS124S08 , ADS125H02 , ADS1260 , ADS1261 , ADS1262 , ADS1263
Design considerations should be exactly the same as the two series, two-wire RTD design in Section 2.7
The measurement circuit requires:
Then, verify that VAIN1 and VAIN2, and VAIN3 and VAIN4 are in the input range of the PGA. Calculate the voltages for AIN1 and AIN2 and then AIN3 and AIN4 at the maximum differential input voltages. For the first measurement:
Then for the second measurement:
Additionally, verify that the voltage seen at the IDAC pin (where VAIN0 = VAIN1) is within the current source compliance voltage. When the IDAC output voltage rises too close to AVDD, the IDAC loses compliance and the excitation current is reduced.