SBAA275A June   2018  – March 2023 ADS1120 , ADS112C04 , ADS112U04 , ADS1147 , ADS1148 , ADS114S06 , ADS114S06B , ADS114S08 , ADS114S08B , ADS1220 , ADS122C04 , ADS122U04 , ADS1247 , ADS1248 , ADS124S06 , ADS124S08 , ADS125H02 , ADS1260 , ADS1261 , ADS1262 , ADS1263

 

  1.   A Basic Guide to RTD Measurements
  2. 1RTD Overview
    1. 1.1 Callendar-Van Dusen Equation
    2. 1.2 RTD Tolerance Standards
    3. 1.3 RTD Wiring Configurations
    4. 1.4 Ratiometric Measurements
      1. 1.4.1 Lead Resistance Cancellation
      2. 1.4.2 IDAC Current Chopping
    5. 1.5 Design Considerations
      1. 1.5.1 Identify the RTD Range of Operation
      2. 1.5.2 Set the Excitation Current Sources and Consider RTD Self Heating
      3. 1.5.3 Set Reference Voltage and PGA Gain
      4. 1.5.4 Verify the Design Fits the Device Range of Operation
      5. 1.5.5 Design Iteration
  3. 2RTD Measurement Circuits
    1. 2.1  Two-Wire RTD Measurement With Low-Side Reference
      1. 2.1.1 Schematic
      2. 2.1.2 Pros and Cons
      3. 2.1.3 Design Notes
      4. 2.1.4 Measurement Conversion
      5. 2.1.5 Generic Register Settings
    2. 2.2  Two-Wire RTD Measurement With High-Side Reference
      1. 2.2.1 Schematic
      2. 2.2.2 Pros and Cons
      3. 2.2.3 Design Notes
      4. 2.2.4 Measurement Conversion
      5. 2.2.5 Generic Register Settings
    3. 2.3  Three-Wire RTD Measurement, Low-Side Reference
      1. 2.3.1 Schematic
      2. 2.3.2 Pros and Cons
      3. 2.3.3 Design Notes
      4. 2.3.4 Measurement Conversion
      5. 2.3.5 Generic Register Settings
      6. 2.3.6 Chopping IDAC Currents for Matching
    4. 2.4  Three-Wire RTD Measurement, Low-Side Reference, One IDAC Current Source
      1. 2.4.1 Schematic
      2. 2.4.2 Pros and Cons
      3. 2.4.3 Design Notes
      4. 2.4.4 Measurement Conversion
      5. 2.4.5 Configuration Register Settings
    5. 2.5  Three-Wire RTD Measurement, High-Side Reference
      1. 2.5.1 Schematic
      2. 2.5.2 Pros and Cons
      3. 2.5.3 Design Notes
      4. 2.5.4 Measurement Conversion
      5. 2.5.5 Configuration Register Settings
    6. 2.6  Four-Wire RTD Measurement, Low-Side Reference
      1. 2.6.1 Schematic
      2. 2.6.2 Pros and Cons
      3. 2.6.3 Design Notes
      4. 2.6.4 Measurement Conversion
      5. 2.6.5 Configuration Register Settings
    7. 2.7  Two Series Two-Wire RTD Measurements, Low-Side Reference
      1. 2.7.1 Schematic
      2. 2.7.2 Pros and Cons
      3. 2.7.3 Design Notes
      4. 2.7.4 Measurement Conversion
      5. 2.7.5 Configuration Register Settings
    8. 2.8  Two Series Four-Wire RTD Measurements
      1. 2.8.1 Schematic
      2. 2.8.2 Pros and Cons
      3. 2.8.3 Design Notes
      4. 2.8.4 Measurement Conversion
      5. 2.8.5 Configuration Measurement Settings
    9. 2.9  Multiple Two-Wire RTD Measurements
      1. 2.9.1 Schematic
      2. 2.9.2 Pros and Cons
      3. 2.9.3 Design Notes
      4. 2.9.4 Measurement Conversion
      5. 2.9.5 Configuration Register Settings
    10. 2.10 Multiple Three-Wire RTD Measurements
      1. 2.10.1 Schematic
      2. 2.10.2 Pros and Cons
      3. 2.10.3 Design Notes
      4. 2.10.4 Measurement Conversion
      5. 2.10.5 Configuration Register Settings
    11. 2.11 Multiple Four-Wire RTD Measurements in Parallel
      1. 2.11.1 Schematic
      2. 2.11.2 Pros and Cons
      3. 2.11.3 Design Notes
      4. 2.11.4 Measurement Conversion
      5. 2.11.5 Configuration Register Settings
    12. 2.12 Universal RTD Measurement Interface With Low-Side Reference
      1. 2.12.1 Schematic
      2. 2.12.2 Pros and Cons
      3. 2.12.3 Design Notes
        1. 2.12.3.1 Universal Measurement Interface - Two-Wire RTD
        2. 2.12.3.2 Universal Measurement Interface - Three-Wire RTD
        3. 2.12.3.3 Universal Measurement Interface - Four-Wire RTD
      4. 2.12.4 Measurement Conversion
        1. 2.12.4.1 Two-Wire Measurement
        2. 2.12.4.2 Three-Wire Measurement
        3. 2.12.4.3 Four-Wire Measurement
      5. 2.12.5 Configuration Register Settings
    13. 2.13 Universal RTD Measurement Interface With High-Side Reference
      1. 2.13.1 Schematic
      2. 2.13.2 Pros and Cons
      3. 2.13.3 Design Notes
        1. 2.13.3.1 Universal Measurement Interface, High-Side Reference - Two-Wire RTD
        2. 2.13.3.2 Universal Measurement Interface, High-Side Reference - Three-Wire RTD
        3. 2.13.3.3 Universal Measurement Interface, High-Side Reference - Four-Wire RTD
      4. 2.13.4 Measurement Conversion
        1. 2.13.4.1 Two-Wire Measurement
        2. 2.13.4.2 Three-Wire Measurement
        3. 2.13.4.3 Four-Wire Measurement
      5. 2.13.5 Configuration Register Settings
  4. 3Summary
  5. 4Revision History

2.11.3 Design Notes

Figure 2-11 shows a circuit topology measuring four four-wire RTDs. To make four measurements, IDAC1 is routed to lead 1 of each RTD individually for the measurement. The analog inputs are connected to leads 2 and 3 of each RTD. All RTDs are joined together through lead 4, so that the IDAC1 current is shunted to a common reference resistor.

The measurement circuit requires:

  • A single dedicated IDAC output pin and AINP and AINN inputs for each RTD measurement
  • External reference input
  • Precision reference resistor

The multiplexer isolates each RTD measurement. First IDAC1 is routed to AIN0 for the RTD1 measurement between AIN1 and AIN2. Aside from a small amount of input leakage current for each analog pin, the connections to RTD2, RTD3, and RTD4 should have no bearing on the RTD1 measurement.

After measuring RTD1, IDAC1 is then routed to AIN3 to measure RTD2 between AIN4 and AIN5. This continues by routing IDAC1 to AIN6 for measuring RTD3, and by routing IDAC1 to AIN9 for measuring RTD4. Each RTD measurement requires three pins from the device. One pin sources the IDAC current to provide the excitation, while the other two pins are the analog inputs used to measure the RTD. Notice that the topology is similar to that shown in the four-wire RTD design in Section 2.6, with the exception that the IDAC current is brought out to the connection of lead 1 of each RTD, separated from the measurement leads.

Cycling from channel-to-channel, may require some delay to account for settling as the IDAC1 is routed to different RTDs. Even if the IDAC change is instantaneous, the current is routed from AIN0, to AIN3, to AIN6, and to AIN9. This requires that the voltages from the RTDs settle through the input RC filter at the front end of the ADC. For most devices, this must be programmed in from the SPI master. For some devices, a built-in programmable delay can be used to insert a small time period to allow for input settling.