SNLA299 August   2018 LMH0324 , LMH0397 , LMH1208 , LMH1218 , LMH1219 , LMH1297

 

  1.   LMH12xx MADI Compatibility Application Note
    1.     Trademarks
    2. 1 MADI Specification Requirements
      1. 1.1 MADI Transmitter Electrical Requirements
        1. 1.1.1 Line Driver Impedance
        2. 1.1.2 Mean Output Voltage
        3. 1.1.3 Maximum Output Voltage
        4. 1.1.4 Terminated Signal Rise and Fall Time
      2. 1.2 MADI Receiver Electrical Requirements
    3. 2 LMH12xx Device Family
      1. 2.1 LMH12xx Device Family
        1. 2.1.1 LMH1297 MADI Modes of Operation
          1. 2.1.1.1 Dual MADI Cable Driver
          2. 2.1.1.2 SDI Bidirectional IO and MADI Cable Driver
          3. 2.1.1.3 Bidirectional MADI Port and SDI MADI Cable Driver
          4. 2.1.1.4 Bidrectional MADI Port and SDI Cable Driver
        2. 2.1.2 LMH1297 Device Family Register Changes for MADI Compatibility
        3. 2.1.3 LMH1297 Device Family Hardware Changes for MADI Compatibility
      2. 2.2 LMH1218 Device Family Hardware Changes to Support MADI Compatibility
      3. 2.3 LMH1219 Device Family Recommended Register Settings
    4. 3 Summary
    5. 4 References

2.2 LMH1218 Device Family Hardware Changes to Support MADI Compatibility

The LMH1218 and LMH0318 devices were first-generation, 12G-SDI cable drivers designed to meet SDI SMPTE requirements. Thus amplitude was designed to be within 800 mV ±10%. Therefore to meet the MADI 300-mV to 600-mV output amplitude, a 6-dB passive attenuator block can be used. If the user wanted to slow down the slew rate in a similar way to the LMH1297 device changes shown in Section 2.1.3, a 10-pF capacitor can be added across OUT0± (see Figure 8).

fbd3-snla299.gifFigure 8. LMH1218 Block Diagram

The following register settings forces raw or CDR bypass for the LMH1218 device:

RAW FF 04 07 //enable retimer registers

RAW 09 00 20 //enable override

RAW 1C 0C 0C //out0 and out1 raw data