SNVAA98 January   2024 LM25148 , LM74910-Q1 , TPS38700 , TPS389006 , TPS389006-Q1 , TPS628301 , TPS628302 , TPS628303 , TPS6287B10 , TPS6287B15 , TPS6287B20 , TPS6287B25 , TPS746

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. Introduction
  5. Design Parameters
  6. Schematics
  7. Design Considerations
  8. Front-End Protection
  9. 3.3V Always-ON Bias Supply
  10. 5V Pre-Regulator Buck Converter
  11. Low-Voltage High-Current Core Rail Buck Converter
  12. On-Board Core Rail Output Load Transient Stepper
  13. 10Multiple Peripheral Rail Buck Converters Sub-Circuits Schematic
  14. 11Voltage Supervisor and Sequencer
  15. 1212-Channel Sequencer Alternative
  16. 13Summary
  17. 14References

Design Parameters

Table 2-1 show the power rails specifications including voltages and tolerances, load currents, and sequence order for each rail. This reference design has been designed to meet all AI Edge Series power delivery specifications.

Table 2-1 VE2302 Device Power Rail Specifications.
Rail NameVoltageDC Spec.AC Spec.CurrentStepSequence #
VCCINT/VCC_PMC/VCC_PSFP/VCCPSLP/VCC_RAM/VCC_SOC/VCC_IO0.8V±1%±17mV39A33%2
VCCO1.5V±1%±5%3A100%1
VCCAUX/VCCAUX_PMC/VCCAUX_SMON1.5V±1%10mVpp1.1A100%3
GTAVCC0.88V±2%10mVpp0.7A70%4
GTAVTT1.2V±2%10mVpp1.3A70%6
GTAVCCAUX1.5V±2%10mVpp0.05A70%5

Figure 2-1 shows the block diagram of the power tree for the VE2302 device.

GUID-20231120-SS0I-CG4B-CMS8-MVCF8ZGQWCBG-low.svgFigure 2-1 VE2302 Device Minimum Rails Configuration Power Tree Block Diagram