SNOAA35F April   2019  – December 2024 LM2901 , LM2901B , LM2901B-Q1 , LM2903 , LM2903-Q1 , LM2903B , LM2903B-Q1 , LM339 , LM339-N , LM393 , LM393-N , LM393B , LM397 , TL331 , TL331-Q1 , TL331B

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. Devices Covered in Application Note
    1. 1.1 Base Part Numbers
    2. 1.2 Input Voltage Offset Grades
    3. 1.3 Maximum Supply Voltage
    4. 1.4 High Reliability Options
  5. The New TL331B, TL391B, LM339B, LM393B, LM2901B and LM2903B B Versions
  6. PCN's to Change Classic Die to a New Die Design
    1. 3.1 PCN #1 for Single and Dual (TL331 and LMx93/LM2903)
    2. 3.2 PCN #2 for Single and Dual (TL331 and LMx93/LM2903)
    3. 3.3 PCN For Quad (LMx39, LM2901)
    4. 3.4 PCN for B Devices (including -Q1's)
    5. 3.5 Device PCN Summary
    6. 3.6 Determining Die Version Used
      1. 3.6.1 Determine Die Used for Single TL331 and Dual LM293, LM393, and LM2903 - PCN #1 (Ji3)
      2. 3.6.2 Determine Die Used for Single TL331 and Dual LM293, LM393, and LM2903 - PCN #2 (TiB)
      3. 3.6.3 Determine Die Used for Quad LM139, LM239, LM339, and LM2901
      4. 3.6.4 Determine Die Used for Post-PCN B Devices
  7. Changes to Package Top Markings
  8. Roughened Leadframe Finish
  9. Input Considerations
    1. 6.1  Input Stage Schematic – The Classic LM339 Family
    2. 6.2  Input Stage Schematic - New "B" and TiB Devices
    3. 6.3  Differences Between the Classic, "B" and Tib Die Devices
    4. 6.4  Input Voltage Range
    5. 6.5  Input Voltage Range vs. Common Mode Voltage Range
    6. 6.6  Reason for Input Range Headroom Limitation
    7. 6.7  Input Voltage Range Feature
    8. 6.8  Both Inputs Above Input Range Behavior
    9. 6.9  Negative Input Voltages
      1. 6.9.1 Maximum Input Current
      2. 6.9.2 Phase Reversal or Inversion
      3. 6.9.3 Protecting Inputs from Negative Voltages
        1. 6.9.3.1 Simple Resistor and Diode Clamp
        2. 6.9.3.2 Voltage Divider with Clamp
          1. 6.9.3.2.1 Split Voltage Divider with Clamp
    10. 6.10 Power-Up Behavior
    11. 6.11 Capacitors and Hysteresis
    12. 6.12 Output to Input Cross-Talk
  10. Output Stage Considerations
    1. 7.1 Output VOL and IOL
    2. 7.2 Pull-Up Resistor Selection
    3. 7.3 Short Circuit Sinking Current
    4. 7.4 Pulling Output Up Above Vcc
    5. 7.5 Negative Voltages Applied to Output
    6. 7.6 Adding Large Filter Capacitors To Output
  11. Power Supply Considerations
    1. 8.1 Supply Bypassing
      1. 8.1.1 Low VCC Guidance
      2. 8.1.2 Split Supply use
  12. General Comparator Usage
    1. 9.1 Unused Comparator Connections
      1. 9.1.1 Do Not Connect Inputs Directly to Ground
      2. 9.1.2 Unused Comparator Input Connections
      3. 9.1.3 Leave Outputs Floating
      4. 9.1.4 Prototyping
  13. 10PSpice and TINA TI Models
  14. 11Conclusion
  15. 12Related Documentation
    1. 12.1 Related Links
  16. 13Revision History

Differences Between the Classic, "B" and Tib Die Devices

While effort was made to make the new devices drop-in compatible with the classic devices, there are differences when operated outside of the data sheet specifications.

One major difference is the Section 6.8 is inverted. The "B" and Ji3 Post-PCN#1 Single and Dual output can go high when both inputs are above VCM.

The Quad and post-PCN "B" devices have a different design, adding a clamp, to mimic the behavior of the classic die when both inputs are above VCM (output goes low).

Because the new designs are slightly faster with lower typical offset voltages, the comparator tends to be more sensitive to noise spikes, ringing and glitches that the older, slower classic design possibly ignored. Marginal system designs with excessive ground noise, very noisy input signals, noisy supplies or poor supply bypassing can now show false or multiple triggers. TI recommends proper supply bypassing (100nF minimum) directly between the supply pins. Input signals can be filtered to minimize high frequency noise and transients.

Due to the internal smaller device geometry and tighter junction spacing, the newer B devices tend to be slightly more sensitive to negative input voltages (voltages below the GND pin) and negative supply transients. Please see Section 6.9 for more information to protect against negative inputs.