SLUAAO5B January 2023 – August 2024 TPS561243 , TPS561246 , TPS562202 , TPS562203 , TPS562206 , TPS562207 , TPS562242 , TPS562243 , TPS562246 , TPS563202 , TPS563203 , TPS563206 , TPS563207 , TPS563252 , TPS563257 , TPS564242 , TPS564247 , TPS564252 , TPS564255 , TPS564257 , TPS565242 , TPS565247 , TPS566242 , TPS566247
Buck converter applications commonly require co-layout between devices with different pinouts due to the design flexibility this provides. This application note focuses on how to co-layout among three types of SOT-563 packages. First, the pinout of TPS56x252/7, TPS56x242/7, TPS56x243/6 and TPS56x203/6 are compared. Next, the schematic design is introduced. Finally, this application design is verified based on experiments.
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The TPS56x252/7, TPS56x242/7, TPS56x243/6 and TPS56x203/6 are all single output, adaptive on-time, D-CAP3™ control mode, synchronous buck converters that require very low external component count in SOT-563 packages. However, the pinout for each device is slightly different. This application note mainly discusses how to do co-layout among TPS56x252/7, TPS56x242/7, TPS56x243/6 and TPS56x203/6.
The TPS56x243/6 and TPS56x203/6 pinout with SOT-563 package is shown in Figure 2-1. TPS56x243/6 and TPS56x203/6 pinout is quite common in the industry. The TPS56x242/7 pinout with SOT-563 package, which has been optimized is shown in Figure 2-2. This pinout integrates BST capacitor and adds AGND for pin 4.The TPS56x252/7 pinout with SOT-563 package is shown in Figure 2-3. This pinout integrates BST capacitor and add PG for pin 4. These three device families have the same pin functionality aside from pin 4 as shown in Table 2-1. With compatible external circuitry, co-layout can be achieved for the three packages.
Pin | Description | |
---|---|---|
No. | Name | |
1 | VIN | Input voltage supply pin. Connect the input decoupling capacitors between VIN and GND. |
2 | SW | Switch node pin. Connect the output inductor to this pin. |
3 | GND | GND pin source terminal of the low-side power NFET as well as the ground terminal for controller circuit. |
4 | PG | Open-drain power-good indicator. |
AGND | Ground of the internal analog circuitry. Connect AGND to the GND plane. | |
BST | Supply input for the high-side NFET gate driver circuit. Connect 0.1-uF capacitor between BST and SW pins. | |
5 | EN | Enable input control. Driving EN high enables the converter. |
6 | FB | Converter feedback input. Connect to the output voltage with a feedback resistor divider. |