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SN74AC2G101

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Two-channel configurable gate for clock input with Schmitt-trigger inputs

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Data sheet

SN74AC2G101

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Data sheet Order now

Product details

Technology family AC Supply voltage (min) (V) 1.5 Supply voltage (max) (V) 6 Number of channels 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type Schmitt-Trigger Output type Push-Pull Features Input clamp diode, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AC Supply voltage (min) (V) 1.5 Supply voltage (max) (V) 6 Number of channels 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type Schmitt-Trigger Output type Push-Pull Features Input clamp diode, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
WQFN (BQB) 16 8.75 mm² 3.5 x 2.5
  • Wide operating range of 1.5V to 6V
  • Inputs accept voltages up to 6V
  • Continuous ±24mA output drive at 5V
  • Supports up to ±75mA output drive at 5Vin short bursts
  • Drives 50Ω transmission lines
  • Maximum tpd of 11.3ns at 5V, 50pF load
  • Wide operating range of 1.5V to 6V
  • Inputs accept voltages up to 6V
  • Continuous ±24mA output drive at 5V
  • Supports up to ±75mA output drive at 5Vin short bursts
  • Drives 50Ω transmission lines
  • Maximum tpd of 11.3ns at 5V, 50pF load

The SN74AC2G101 contains two independent D-type flip-flops with rising edge triggered configurable logic clock, active low clear, and data inputs. The clock inputs can be configured for many 1- and 2-input logic functions, including buffer, inverter, AND, OR, NAND, NOR, XOR, XNOR. All inputs have Schmitt-trigger architecture to support slow or noisy input signals..

The SN74AC2G101 contains two independent D-type flip-flops with rising edge triggered configurable logic clock, active low clear, and data inputs. The clock inputs can be configured for many 1- and 2-input logic functions, including buffer, inverter, AND, OR, NAND, NOR, XOR, XNOR. All inputs have Schmitt-trigger architecture to support slow or noisy input signals..
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Technical documentation

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Type Title Date
* Data sheet SN74AC2G101 Dual Configurable Clock Flip-Flops With Clear datasheet PDF | HTML 03 Sep 2024
Application brief Utilizing Configurable Logic in System Design PDF | HTML 30 Oct 2024
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
More literature HiRel Unitrode Power Management Brochure 07 Jul 2009
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

User guide: PDF | HTML
Not available on TI.com
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WQFN (BQB) 16 Ultra Librarian
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