Produktdetails

Protocols Analog Audio Configuration 2:1 SPDT Number of channels 2 Bandwidth (MHz) 18.3 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 2.3 Ron (typ) (mΩ) 520 Input/output voltage (min) (V) -3.2 Input/output voltage (max) (V) 5.5 Supply current (typ) (µA) 0.2 ESD HBM (typ) (kV) 2.5 Operating temperature range (°C) -40 to 85 Crosstalk (dB) -78 ESD CDM (kV) 1.5 Input/output continuous current (max) (mA) 350 COFF (typ) (pF) 70 CON (typ) (pF) 370 Off isolation (typ) (dB) -68 OFF-state leakage current (max) (µA) 0.375 Ron (max) (mΩ) 1300 Ron channel match (max) (Ω) 0.15 RON flatness (typ) (Ω) 0.076 Turnoff time (disable) (max) (ns) 70 Turnon time (enable) (max) (ns) 120 VIH (min) (V) 1.4 VIL (max) (V) 0.8
Protocols Analog Audio Configuration 2:1 SPDT Number of channels 2 Bandwidth (MHz) 18.3 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 2.3 Ron (typ) (mΩ) 520 Input/output voltage (min) (V) -3.2 Input/output voltage (max) (V) 5.5 Supply current (typ) (µA) 0.2 ESD HBM (typ) (kV) 2.5 Operating temperature range (°C) -40 to 85 Crosstalk (dB) -78 ESD CDM (kV) 1.5 Input/output continuous current (max) (mA) 350 COFF (typ) (pF) 70 CON (typ) (pF) 370 Off isolation (typ) (dB) -68 OFF-state leakage current (max) (µA) 0.375 Ron (max) (mΩ) 1300 Ron channel match (max) (Ω) 0.15 RON flatness (typ) (Ω) 0.076 Turnoff time (disable) (max) (ns) 70 Turnon time (enable) (max) (ns) 120 VIH (min) (V) 1.4 VIL (max) (V) 0.8
DSBGA (YZP) 10 2.8125 mm² 2.25 x 1.25 VSON (DRC) 10 9 mm² 3 x 3 VSSOP (DGS) 10 14.7 mm² 3 x 4.9
  • Specified break-before-make switching
  • Negative signaling capability: maximum swing from –2.75 V to 2.75 V (VCC = 2.75 V)
  • Low ON-state resistance (0.65 Ω typical)
  • Low charge injection
  • Excellent ON-state resistance matching
  • 2.3-V to 5.5-V Power supply (VCC)
  • Latch-Up performance exceeds 100 mA Per JESD 78, Class II
  • ESD Performance tested per JESD 22
    • 2500-V Human-body model
      (A114-B, class II)
    • 1500-V Charged-device model (C101)
    • 200-V Machine model (A115-A)
  • Specified break-before-make switching
  • Negative signaling capability: maximum swing from –2.75 V to 2.75 V (VCC = 2.75 V)
  • Low ON-state resistance (0.65 Ω typical)
  • Low charge injection
  • Excellent ON-state resistance matching
  • 2.3-V to 5.5-V Power supply (VCC)
  • Latch-Up performance exceeds 100 mA Per JESD 78, Class II
  • ESD Performance tested per JESD 22
    • 2500-V Human-body model
      (A114-B, class II)
    • 1500-V Charged-device model (C101)
    • 200-V Machine model (A115-A)

The TS5A22362 is a bidirectional, 2-channel single-pole double-throw (SPDT) analog switch designed to operate from 2.3 V to 5.5 V. The device features negative signal swing capability that allows signals below ground to pass through the switch without distortion. The break-before-make feature prevents signal distortion during the transferring of a signal from one path to another. Low ON-state resistance, excellent channel-to-channel ON-state resistance matching, and minimal total harmonic distortion (THD) performance are ideal for audio applications. The 3.00 mm × 3.00 mm DRC package is also available as a nonmagnetic package for medical imaging application.

The TS5A22362 is a bidirectional, 2-channel single-pole double-throw (SPDT) analog switch designed to operate from 2.3 V to 5.5 V. The device features negative signal swing capability that allows signals below ground to pass through the switch without distortion. The break-before-make feature prevents signal distortion during the transferring of a signal from one path to another. Low ON-state resistance, excellent channel-to-channel ON-state resistance matching, and minimal total harmonic distortion (THD) performance are ideal for audio applications. The 3.00 mm × 3.00 mm DRC package is also available as a nonmagnetic package for medical imaging application.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet TS5A22362 0.65-Ω 2-channel SPDT Analog Switches With Negative Signaling Capability datasheet (Rev. E) PDF | HTML 25 Sep 2019
Application brief 1.8-V Logic for Multiplexers and Signal Switches (Rev. C) PDF | HTML 26 Jul 2022
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dez 2021
Application note Preventing Excess Power Consumption on Analog Switches 03 Jul 2008
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004

Design und Entwicklung

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Schnittstellenadapter

LEADED-ADAPTER1 — Oberflächenmontierbarer DIP-Header-Adapter zur schnellen Prüfung der 5-, 8-, 10-, 16- und 24-poligen

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Benutzerhandbuch: PDF
Schnittstellenadapter

LEADLESS-ADAPTER1 — Oberflächenmontierbarer DIP-Header-Adapter zum Testen der 6-, 8-, 10-, 12-, 14-, 16- und 20-poligen

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
Benutzerhandbuch: PDF
Simulationsmodell

HSPICE Model for TS5A22362

SCDM121.ZIP (105 KB) - HSpice Model
Simulationsmodell

TS5A22362 IBIS Model

SCDM120.ZIP (68 KB) - IBIS Model
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
DSBGA (YZP) 10 Ultra Librarian
VSON (DRC) 10 Ultra Librarian
VSSOP (DGS) 10 Ultra Librarian

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