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UCC21220

ACTIVO

Controlador de puerta aislada de doble canal (4 A/6 A) y 3.0 kVrms, con pin de desactivación y UVLO

Detalles del producto

Number of channels 2 Isolation rating Basic Withstand isolation voltage (VISO) (Vrms) 3000 Working isolation voltage (VIOWM) (Vrms) 990 Transient isolation voltage (VIOTM) (VPK) 4242 Power switch IGBT, MOSFET Peak output current (A) 6 Features Disable Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 990 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 5, 8
Number of channels 2 Isolation rating Basic Withstand isolation voltage (VISO) (Vrms) 3000 Working isolation voltage (VIOWM) (Vrms) 990 Transient isolation voltage (VIOTM) (VPK) 4242 Power switch IGBT, MOSFET Peak output current (A) 6 Features Disable Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.028 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 990 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 5, 8
SOIC (D) 16 59.4 mm² 9.9 x 6
  • Universal: dual low-side, dual high-side or half-bridge driver
  • Supports basic and functional isolation
  • CMTI greater than 125V/ns
  • Up to 4A peak source, 6A peak sink output
  • Switching parameters:
    • 33ns typical propagation delay
    • 5ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • Up to 25V VDD output drive supply
    • 5V and 8V VDD UVLO Options
  • Junction temperature range (Tj) –40°C to 150°C
  • Narrow body SOIC-16 (D) package
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 4242VPK isolation per DIN EN IEC 60747-17 (VDE 0884-17) (planned)
    • 3000VRMS isolation for 1 minute per UL 1577 (planned)
    • CQC certification per GB4943.1-2022 (planned)
  • Universal: dual low-side, dual high-side or half-bridge driver
  • Supports basic and functional isolation
  • CMTI greater than 125V/ns
  • Up to 4A peak source, 6A peak sink output
  • Switching parameters:
    • 33ns typical propagation delay
    • 5ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • Up to 25V VDD output drive supply
    • 5V and 8V VDD UVLO Options
  • Junction temperature range (Tj) –40°C to 150°C
  • Narrow body SOIC-16 (D) package
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 4242VPK isolation per DIN EN IEC 60747-17 (VDE 0884-17) (planned)
    • 3000VRMS isolation for 1 minute per UL 1577 (planned)
    • CQC certification per GB4943.1-2022 (planned)

The UCC21220 and UCC21220A devices are basic and functional isolated dual-channel gate drivers with 4A peak-source and 6A peak-sink current. They are designed to drive power MOSFETs and GaNFETs in PFC, Isolated DC/DC, and synchronous rectification applications, with fast switching performance and robust ground bounce protection through greater than 125V/ns common-mode transient immunity (CMTI).

These devices can be configured as two low-side drivers, two high-side drivers, or half-bridge drivers. Two outputs can be paralleled to form a single driver which doubles the drive strength for heavy load conditions due to the best-in-class delay matching performance.

Protection features include the following: DIS pin shuts down both outputs simultaneously when it is set high, all supplies have undervoltage lockout (UVLO), and active pulldown protection clamps the output below 2V when unpowered or floated.

With these features, these devices enable high efficiency, high power density, and robustness in a wide variety of power applications.

The UCC21220 and UCC21220A devices are basic and functional isolated dual-channel gate drivers with 4A peak-source and 6A peak-sink current. They are designed to drive power MOSFETs and GaNFETs in PFC, Isolated DC/DC, and synchronous rectification applications, with fast switching performance and robust ground bounce protection through greater than 125V/ns common-mode transient immunity (CMTI).

These devices can be configured as two low-side drivers, two high-side drivers, or half-bridge drivers. Two outputs can be paralleled to form a single driver which doubles the drive strength for heavy load conditions due to the best-in-class delay matching performance.

Protection features include the following: DIS pin shuts down both outputs simultaneously when it is set high, all supplies have undervoltage lockout (UVLO), and active pulldown protection clamps the output below 2V when unpowered or floated.

With these features, these devices enable high efficiency, high power density, and robustness in a wide variety of power applications.

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Documentación técnica

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* Data sheet UCC21220, UCC21220A 4A, 6A, Dual-Channel Basic and Functional Isolated Gate Drivers with High Noise Immunity datasheet (Rev. G) PDF | HTML 08 nov 2024
Certificate VDE Certificate for Basic Isolation for DIN EN IEC 60747-17 (Rev. W) 31 ene 2024
Application note Impact of Narrow Pulse Widths in Gate Driver Circuits (Rev. A) PDF | HTML 25 ene 2024
Certificate UCC21220 CQC Certificate of Product Certification (Malaysia) 29 ago 2023
Certificate UCC21220 CQC Certificate of Product Certification 16 ago 2023
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 16 dic 2021
Test report Peak Efficiency at 99%, 585-W High-Voltage Buck Reference Design 24 abr 2020
Application brief External Gate Resistor Selection Guide (Rev. A) 28 feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 feb 2020
E-book E-book: An engineer’s guide to industrial robot designs 12 feb 2020
Certificate UL Certification E181974 Vol 4. Sec 9 (Rev. A) 22 jul 2019
User guide Gate Drive Voltage vs. Efficiency 25 abr 2019
Application brief How to Drive High Voltage GaN FETs with UCC21220A 06 mar 2019
White paper Impact of an isolated gate driver (Rev. A) 20 feb 2019
Application note Common Mode Transient Immunity (CMTI) for UCC2122x Isolated Gate Drivers 19 jul 2018
White paper Demystifying high-voltage power electronics for solar inverters 06 jun 2018
Application note Solar Inverter Layout Considerations for UCC21220 06 jun 2018
Technical article Boosting efficiency for your solar inverter designs PDF | HTML 24 may 2018
EVM User's guide UCC21220EVM-009 User's Guide (Rev. B) 12 abr 2018
Technical article Why capacitive isolation: a vital building block for sensors in smart cities PDF | HTML 16 ene 2018
Technical article Making a solar inverter more reliable than the sun PDF | HTML 01 ago 2017

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

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Guía del usuario: PDF
Modelo de simulación

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Modelo de simulación

UCC21220AD Unencrypted PSpice Transient Model

SLUM650.ZIP (3 KB) - PSpice Model
Modelo de simulación

UCC21220D PSpice Transient Model

SLUM602.ZIP (51 KB) - PSpice Model
Modelo de simulación

UCC21220D Unencrypted PSpice Transient Model

SLUM603.ZIP (3 KB) - PSpice Model
Herramienta de cálculo

SLURAZ5 UCC21520 Bootstrap Calculator 1.0

Productos y hardware compatibles

Productos y hardware compatibles

Productos
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UCC21220 Controlador de puerta aislada de doble canal (4 A/6 A) y 3.0 kVrms, con pin de desactivación y UVLO UCC21222 Controlador de puerta aislada de doble canal (4 A/6 A) y 3.0 kVrms, con pin de desactivación, tiempo UCC21520 Controlador de puerta aislado de doble canal, 4A/6A, 5.7 kVRMS con entrada doble, pin de desactivaci UCC21521 Controlador de puerta aislada de doble canal (4 A/6 A) y 5.7 kVrms con entrada doble, activación
Herramienta de simulación

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
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Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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Soporte y capacitación

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