TLV320ADC3001

ACTIVE

Product details

Number of ADC channels 2 Analog inputs 3 Digital audio interface DSP, I2S, L, PCM, R, TDM Control interface I2C Sampling rate (max) (kHz) 96 ADC SNR (typ) (dB) 92 Rating Catalog Analog outputs 0 Operating temperature range (°C) -40 to 85
Number of ADC channels 2 Analog inputs 3 Digital audio interface DSP, I2S, L, PCM, R, TDM Control interface I2C Sampling rate (max) (kHz) 96 ADC SNR (typ) (dB) 92 Rating Catalog Analog outputs 0 Operating temperature range (°C) -40 to 85
DSBGA (YZH) 16 5.0625 mm² 2.25 x 2.25
  • Stereo Audio ADC
    • 92-dBA Signal-to-Noise Ratio
    • Supports ADC Sample Rates From 8 kHz to
      96 kHz
  • Instruction-Programmable Embedded miniDSP
  • Flexible Digital Filtering With RAM Programmable
    Coefficient, Instructions, and Built-In Standard
    Modes
    • Low-Latency IIR Filters for Voice
    • Linear Phase FIR Filters for Audio
    • Additional Programmable IIR Filters for EQ,
      Noise Cancellation, or Reduction
    • Up to 128 Programmable ADC Digital Filter
      Coefficients
  • Three Audio Inputs With Configurable Automatic
    Gain Control (AGC)
    • Programmable in Single-Ended or Fully
      Differential Configurations
    • Can Be Driven Hi-Z for Easy Interoperability
      With Other Audio ICs
  • Low Power Consumption and Extensive Modular
    Power Control:
    • 6-mW Mono Record 8-kHz
    • 11-mW Stereo Record, 8-kHz
    • 10-mW Mono Record, 48-kHz
    • 17-mW Stereo Record, 48-kHz
  • Programmable Microphone Bias
  • Programmable PLL for Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left/Right-
    Justified, DSP, PCM, and TDM Modes
  • Power Supplies:
    • Analog: 2.6 V–3.6 V.
    • Digital: Core: 1.65 V–1.95 V,
      I/O: 1.1 V–3.6 V
  • 2.24-mm × 2.16-mm NanoFree™ 16-Ball 16-YZH
    Wafer Chip Scale Package (WCSP)
  • APPLICATIONS
    • Wireless Handsets
    • Portable Low-Power Audio Systems
    • Noise Cancellation Systems
    • Front-End Voice or Audio Processor for Digital
      Audio

All other trademarks are the property of their respective owners

  • Stereo Audio ADC
    • 92-dBA Signal-to-Noise Ratio
    • Supports ADC Sample Rates From 8 kHz to
      96 kHz
  • Instruction-Programmable Embedded miniDSP
  • Flexible Digital Filtering With RAM Programmable
    Coefficient, Instructions, and Built-In Standard
    Modes
    • Low-Latency IIR Filters for Voice
    • Linear Phase FIR Filters for Audio
    • Additional Programmable IIR Filters for EQ,
      Noise Cancellation, or Reduction
    • Up to 128 Programmable ADC Digital Filter
      Coefficients
  • Three Audio Inputs With Configurable Automatic
    Gain Control (AGC)
    • Programmable in Single-Ended or Fully
      Differential Configurations
    • Can Be Driven Hi-Z for Easy Interoperability
      With Other Audio ICs
  • Low Power Consumption and Extensive Modular
    Power Control:
    • 6-mW Mono Record 8-kHz
    • 11-mW Stereo Record, 8-kHz
    • 10-mW Mono Record, 48-kHz
    • 17-mW Stereo Record, 48-kHz
  • Programmable Microphone Bias
  • Programmable PLL for Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left/Right-
    Justified, DSP, PCM, and TDM Modes
  • Power Supplies:
    • Analog: 2.6 V–3.6 V.
    • Digital: Core: 1.65 V–1.95 V,
      I/O: 1.1 V–3.6 V
  • 2.24-mm × 2.16-mm NanoFree™ 16-Ball 16-YZH
    Wafer Chip Scale Package (WCSP)
  • APPLICATIONS
    • Wireless Handsets
    • Portable Low-Power Audio Systems
    • Noise Cancellation Systems
    • Front-End Voice or Audio Processor for Digital
      Audio

All other trademarks are the property of their respective owners

The TLV320ADC3001 device is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via I2C, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3001 ideal for battery-powered portable equipment.

The AGC programs to a wide range of attack (7 ms–1.4 s) and decay (50 ms–22.4 s) times. A programmable noise gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode.

A programmable integrated PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

The TLV320ADC3001 device is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via I2C, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3001 ideal for battery-powered portable equipment.

The AGC programs to a wide range of attack (7 ms–1.4 s) and decay (50 ms–22.4 s) times. A programmable noise gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode.

A programmable integrated PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 5
Type Title Date
* Data sheet TLV320ADC3001 Low-Power Stereo ADC With Embedded miniDSP for Wireless Handsets and Portable Audio datasheet (Rev. D) PDF | HTML 31 Aug 2015
Application note Audio Serial Interface Configurations for Audio Codecs (Rev. A) 27 Jun 2019
Application note Coefficient RAM Access Mechanisms.. (Rev. D) 25 Jan 2012
Application note Audio Serial Interface Configurations for Audio Codecs 22 Sep 2010
Application note Interfacing an I2S Device to an MSP430 Device (Rev. A) 22 Mar 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

IDE, configuration, compiler or debugger

AICPUREPATH_STUDIO — PurePath™ Studio graphical development environment

PurePath™ Studio Graphical Development Environment is a powerful, easy-to-use tool designed specifically to simplify software development for Audio products with a miniDSP/ Audio Processing capability.

The GDE permits these devices to be programmed to support the processing requirements of a wide (...)

Calculation tool

COEFFICIENT-CALC — Coefficient Calculator For Digital Biquad Filters

COEFFICIENT-CALC (TIBQ) calculates the coefficients for the digital filter biquad transfer function implemented in TI audio codecs. The characteristics of the digital filter are adjusted by selecting a filter type and moving a control point within a window that shows the transfer function gain and (...)
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins CAD symbols, footprints & 3D models
DSBGA (YZH) 16 Ultra Librarian

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos