CD54HC164
- Buffered inputs
- Asynchronous reset
- Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25°C
- Fanout (overtemperature range)
- Standard Outputs: 10 LSTTL loads
- Bus driver outputs: 15 LSTTL loads
- Wide operating temp range: – 55°C to 125°C
- Balanced propagation delay and transition times
- Significant power reduction compared to LSTTL logic ICs
- HC types
- 2V to 6V operation
- High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT types
- 4.5V to 5.5V operation
- Direct LSTTL input logic compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS input compatibility, II ≤ 1µA at VOL, VOH
The ’HC164 and ’HCT164 are 8-bit, serial-in, parallel-out, shift registers with asynchronous reset. Data is shifted on the positive edge of Clock (CLK). A LOW on the RESET (CLR) pin resets the shift register and all outputs go to the LOW state regardless of the input conditions. Two Serial Data inputs (A and B) are provided, either one can be used as a data enable control.
技術文件
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檢視所有 1 類型 | 標題 | 日期 | ||
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* | Data sheet | CDx4HC164, CDx4HCT164 High-Speed CMOS Logic 8-Bit Serial-In, Parallel-Out Shift Register datasheet (Rev. E) | PDF | HTML | 2024年 5月 7日 |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點