產品詳細資料

Function Single-ended Output frequency (max) (MHz) 100 Number of outputs 6 Output supply voltage (V) 5 Core supply voltage (V) 5 Output skew (ps) 0.5 Features Pin control Operating temperature range (°C) -40 to 85 Rating Catalog Output type TTL Input type TTL
Function Single-ended Output frequency (max) (MHz) 100 Number of outputs 6 Output supply voltage (V) 5 Core supply voltage (V) 5 Output skew (ps) 0.5 Features Pin control Operating temperature range (°C) -40 to 85 Rating Catalog Output type TTL Input type TTL
SOIC (D) 16 59.4 mm² 9.9 x 6
  • Low Output Skew for Clock-Distribution and Clock-Generation Applications
  • TTL-Compatible Inputs and Outputs
  • Distributes One Clock Input to Six Clock Outputs
  • Polarity Control Selects True or Complementary Outputs
  • Distributed VCC and GND Pins Reduce Switching Noise
  • High-Drive Outputs (-48-mA IOH, 48-mA IOL)
  • State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
  • Packaged in Plastic Small-Outline Package

    EPIC-IIB is a trademark of Texas Instruments Incorporated.

     

  • Low Output Skew for Clock-Distribution and Clock-Generation Applications
  • TTL-Compatible Inputs and Outputs
  • Distributes One Clock Input to Six Clock Outputs
  • Polarity Control Selects True or Complementary Outputs
  • Distributed VCC and GND Pins Reduce Switching Noise
  • High-Drive Outputs (-48-mA IOH, 48-mA IOL)
  • State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
  • Packaged in Plastic Small-Outline Package

    EPIC-IIB is a trademark of Texas Instruments Incorporated.

     

The CDC391 contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew for clock distribution. Through the use of the polarity-control (T\/C) inputs, various combinations of true and complementary outputs can be obtained. The output-enable () input is provided to disable the outputs to a high-impedance state.

The CDC391 is characterized for operation from -40°C to 85°C.

 

 

The CDC391 contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew for clock distribution. Through the use of the polarity-control (T\/C) inputs, various combinations of true and complementary outputs can be obtained. The output-enable () input is provided to disable the outputs to a high-impedance state.

The CDC391 is characterized for operation from -40°C to 85°C.

 

 

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類型 標題 日期
* Data sheet 1-Line To 6-Line Clock Driver w/ Selectable Polarity And 3-State Output datasheet (Rev. A) 1995年 11月 1日

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模擬型號

CDC391 IBIS Model

SCAM017.ZIP (5 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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SOIC (D) 16 Ultra Librarian

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