CY54FCT574T
- Function, Pinout, and Drive Compatible With FCT and F Logic
- Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
- Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
- Ioff Supports Partial-Power-Down Mode Operation
- Matched Rise and Fall Times
- Fully Compatible With TTL Input and Output Logic Levels
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- Edge-Triggered D-Type Inputs
- 250-MHz Typical Switching Rate
- CY54FCT574T
- 32-mA Output Sink Current
- 12-mA Output Source Current
- CY74FCT574T
- 64-mA Output Sink Current
- 32-mA Output Source Current
- 3-State Outputs
The \x92FCT574T devices are high-speed, low-power, octal D-type flip-flops, featuring separate D-type inputs for each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE\) inputs are common to all flip-flops. The \x92FCT574T are identical to \x92FCT374T, except for a flow-through pinout to simplify board design. The eight flip-flops in the \x92FCT574T store the state of their individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE\ is low, the contents of the eight flip-flops are available at the outputs. When OE\ is high, the outputs are in the high-impedance state. The state of OE\ does not affect the state of the flip-flops.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | 8-Bit Registers With 3-State Outputs datasheet | 2001年 10月 11日 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點