LM98714
- LVDS/CMOS Outputs
- LVDS/CMOS Pixel Rate Input Clock or ADC Input Clock
- CDS or S/H Processing for CCD or CIS Sensors
- Independent Gain/Offset Correction for Each Channel
- Digital Black Level Correction Loop for Each Channel
- Programmable Input Clamp Voltage
- Flexible CCD/CIS Sensor Timing Generator
- Key Specifications
- Maximum Input Level: 1.2 or 2.4 Volt Modes
- (Both with + or – Polarity Option)
- ADC Resolution: 16-Bit
- ADC Sampling Rate: 45 MSPS
- INL: ±23 LSB (Typ)
- Channel Sampling Rate: 15/22.5/30 MSPS
- PGA Gain Steps: 256 Steps
- PGA Gain Range: 0.7 to 7.84x
- Analog DAC Resolution: ±9 Bits
- Analog DAC Range: ±300 mV or ±600 mV
- Digital DAC Resolution: ±6 Bits
- Digital DAC Range: –1024 LSB to + 1008 LSB
- SNR: –74dB (at 0 dB PGA Gain)
- Power Dissipation: 505 mW (LVDS) 610 mW (CMOS)
- Operating Temp: 0 to 70°C
- Supply Voltage: 3.3 V Nominal (3.0 V to 3.6 V Range)
- Maximum Input Level: 1.2 or 2.4 Volt Modes
The LM98714 is a fully integrated, high performance 16-Bit, 45 MSPS signal processing solution for digital color copiers, scanners, and other image processing applications. High-speed signal throughput is achieved with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for Contact Image Sensors and CMOS image sensors). The signal paths utilize 8 bit Programmable Gain Amplifiers (PGA), a ±9-Bit offset correction DAC and independently controlled Digital Black Level correction loops for each input. The PGA and offset DAC are programmed independently allowing unique values of gain and offset for each of the three inputs. The signals are then routed to a 45 MHz high performance analog-to-digital converter (ADC). The fully differential processing channel shows exceptional noise immunity, having a very low noise floor of –74dB. The 16-bit ADC has excellent dynamic performance making the LM98714 transparent in the image reproduction chain.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | LM98714 Three Channel, 16-Bit, 45 MSPS Analog Front End With LVDS/CMOS Output and Integrated CCD/CIS Sensor Timing Generator datasheet (Rev. B) | PDF | HTML | 2017年 4月 3日 |
| Application note | AN-1538 Interfacing Nationals DS90CR218A and LM98714 (Rev. C) | 2013年 4月 26日 | ||
| White paper | Simplify CCD/CIS Image Capturing with a 3-Channel 16-Bit AFE/Timing | 2007年 5月 18日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (DGG) | 48 | Ultra Librarian |
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