SN74ALS841

Name: SN74ALS841
Brand: TI
SKU: SN74ALS841
Price: 3.468 USD

現行

具有 3 態輸出的 10 位元匯流排介面 D 型鎖存器

立即訂購

產品規格表

document-pdfAcrobat 10-Bit Bus-Interface D-Type Latches With 3-State Outputs datasheet (Rev. C) (英文)

SN74ALS841

現行

產品規格表

立即訂購

產品詳細資料

Number of channels

10

Technology family

ALS

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

3-State

Clock frequency (max) (MHz)

75

IOL (max) (mA)

24

IOH (max) (mA)

-2.6

Supply current (max) (µA)

62000

Features

Flow-through pinout, High speed (tpd 10-50ns)

Operating temperature range (°C)

0 to 70

Rating

Catalog

Number of channels

10

Technology family

ALS

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

3-State

Clock frequency (max) (MHz)

75

IOL (max) (mA)

24

IOH (max) (mA)

-2.6

Supply current (max) (µA)

62000

Features

Flow-through pinout, High speed (tpd 10-50ns)

Operating temperature range (°C)

0 to 70

Rating

Catalog

SOIC (DW)

24

159.65 mm² 15.5 x 10.3

3-State Buffer-Type Outputs Drive Bus Lines Directly
Bus-Structured Pinout
Provide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
Buffered Control Inputs to Reduce dc Loading Effects
Power-Up High-Impedance State
Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs

3-State Buffer-Type Outputs Drive Bus Lines Directly
Bus-Structured Pinout
Provide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
Buffered Control Inputs to Reduce dc Loading Effects
Power-Up High-Impedance State
Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs

These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The ten latches are transparent D-type latches. The SN74ALS841 and SN74AS841A have noninverting data (D) inputs. The SN74ALS842 has inverting D\ inputs.

A buffered output-enable () input places the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

does not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are off.

The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for operation from 0°C to 70°C.

These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The ten latches are transparent D-type latches. The SN74ALS841 and SN74AS841A have noninverting data (D) inputs. The SN74ALS842 has inverting D\ inputs.

A buffered output-enable () input places the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

does not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are off.

The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for operation from 0°C to 70°C.

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