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邏輯和電壓轉換
電壓轉換器及電平移位器
方向控制電壓轉換器

SN74AXCH1T45

現行

單位元雙電源匯流排收發器

立即訂購
產品規格表

SN74AXCH1T45

現行
產品規格表 立即訂購

產品詳細資料

Technology family AXC Applications GPIO Bits (#) 1 High input voltage (min) (V) 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 500 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 14 Features Bus-hold, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AXC Applications GPIO Bits (#) 1 High input voltage (min) (V) 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 500 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 14 Features Bus-hold, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8 SOT-SC70 (DCK) 6 4.2 mm² 2 x 2.1 USON (DRY) 6 1.45 mm² 1.45 x 1 X2SON (DTQ) 6 0.8 mm² 1 x 0.8
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate With a Power Supply Range from 0.65 V to 3.6 V
  • Operating Temperature: –40°C to +125°C
  • Glitch-Free Power Supply Sequencing
  • Bus-hold on Data Inputs Eliminates the Need for External Pullup or Pulldown Resistors
  • Maximum Quiescent Current (ICCA + ICCB) of 10 µA (85°C Maximum) and 16 µA (125°C Maximum)
  • Up to 500-Mbps Support When Translating from 1.8 to 3.3 V
  • VCC Isolation Feature
    • If Either VCC Input is Below 100 mV, All I/Os Outputs are Disabled and Become High-Impedance
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human Body Model
    • 1000-V Charged-Device Model
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate With a Power Supply Range from 0.65 V to 3.6 V
  • Operating Temperature: –40°C to +125°C
  • Glitch-Free Power Supply Sequencing
  • Bus-hold on Data Inputs Eliminates the Need for External Pullup or Pulldown Resistors
  • Maximum Quiescent Current (ICCA + ICCB) of 10 µA (85°C Maximum) and 16 µA (125°C Maximum)
  • Up to 500-Mbps Support When Translating from 1.8 to 3.3 V
  • VCC Isolation Feature
    • If Either VCC Input is Below 100 mV, All I/Os Outputs are Disabled and Become High-Impedance
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human Body Model
    • 1000-V Charged-Device Model

The SN74AXCH1T45 is a single-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH1T45 is compatible with a single-supply system.

The DIR pin determines the direction of signal propagation. With the DIR pin configured HIGH, translation is from Port A to Port B. With DIR configured LOW, translation is from Port B to Port A. The DIR pin is referenced to VCCA, meaning that its logic-high and logic-low thresholds track with VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control pin.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

The SN74AXCH1T45 is a single-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH1T45 is compatible with a single-supply system.

The DIR pin determines the direction of signal propagation. With the DIR pin configured HIGH, translation is from Port A to Port B. With DIR configured LOW, translation is from Port B to Port A. The DIR pin is referenced to VCCA, meaning that its logic-high and logic-low thresholds track with VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control pin.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
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類型 標題 日期
* Data sheet SN74AXCH1T45 Single-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation, Tri-State Outputs, and Bus-Hold Inputs datasheet (Rev. C) PDF | HTML 2020年 9月 9日
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024年 7月 12日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Selection guide Voltage Translation Buying Guide (Rev. A) 2021年 4月 15日
Application note Low Voltage Translation for SPI, UART, RGMII, JTAG Interfaces (Rev. B) PDF | HTML 2021年 3月 29日
Application note Glitch free power sequencing with AXC level translators (Rev. A) 2018年 9月 20日
Application note An Overview of Bus-Hold Circuit and the Applications (Rev. B) 2018年 9月 17日

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開發板

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靈活的 EVM 旨在支援任何針腳數為 5 至 8 支且採用 DCK、DCT、DCU、DRL 或 DBV 封裝的裝置。
使用指南: PDF
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開發板

AVCLVCDIRCNTRL-EVM — 適用於方向控制雙向轉換裝置、支援 AVC 和 LVC 的通用 EVM

The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC (...)

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模擬型號

SN74AXCH1T45 IBIS Model

SCEM584.ZIP (27 KB) - IBIS Model
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOT-23 (DBV) 6 Ultra Librarian
SOT-SC70 (DCK) 6 Ultra Librarian
USON (DRY) 6 Ultra Librarian
X2SON (DTQ) 6 Ultra Librarian
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