SN74F174A
- Contains Six Flip-Flops With Single-Rail Outputs
- Buffered Clock and Direct Clear Inputs
- Applications Include:
- Buffer/Storage Registers
- Shift Registers
- Pattern Generators
- Fully Buffered Outputs for Maximum Isolation From External Disturbances
- Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs
This monolithic, positive-edge-triggered flip-flop utilizes TTL
circuitry to implement D-type flip-flop logic with a direct clear
() input.
Information at the data (D) inputs meeting the setup time
requirements is transferred to the outputs on the positive-going edge
of the clock pulse. Clock triggering occurs at a particular voltage
level and is not directly related to the transition time of the
positive-going pulse. When the clock (CLK) input is at either the
high or low level, the D-input signal has no effect at the output.
The SN74F174A is characterized for operation from 0°C to 70°C.
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開發板
14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組
14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
PDIP (N) | 16 | Ultra Librarian |
SOIC (D) | 16 | Ultra Librarian |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點