SN74F175

Name: SN74F175
Brand: TI
SKU: SN74F175
Price: 0.167 USD

現行

具有清除功能的四路 D 型正反器

立即訂購

產品規格表

document-pdfAcrobat Quadruple D-Type Flip-Flop With Clear datasheet (Rev. B) (英文)

SN74F175

現行

產品規格表

立即訂購

產品詳細資料

Number of channels

4

Technology family

F

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

Push-Pull

Clock frequency (max) (MHz)

100

IOL (max) (mA)

20

IOH (max) (mA)

-1

Supply current (max) (µA)

34000

Features

Very high speed (tpd 5-10ns)

Operating temperature range (°C)

0 to 70

Rating

Catalog

Number of channels

4

Technology family

F

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

Push-Pull

Clock frequency (max) (MHz)

100

IOL (max) (mA)

20

IOH (max) (mA)

-1

Supply current (max) (µA)

34000

Features

Very high speed (tpd 5-10ns)

Operating temperature range (°C)

0 to 70

Rating

Catalog

PDIP (N)

16

181.42 mm² 19.3 x 9.4

SOIC (D)

16

59.4 mm² 9.9 x 6

SOP (NS)

16

79.56 mm² 10.2 x 7.8

Contains Four Flip-Flops With Double-Rail Outputs
Buffered Clock and Direct Clear Inputs
Applications Include:
- Buffer/Storage Registers
- Shift Registers
- Pattern Generators

Contains Four Flip-Flops With Double-Rail Outputs
Buffered Clock and Direct Clear Inputs
Applications Include:
- Buffer/Storage Registers
- Shift Registers
- Pattern Generators

This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with a direct clear (CLR)\ input. Information at the data (D) inputs meeting setup-time requirements is transferred to outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output.

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