產品詳細資料

Number of channels 8 Technology family F Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type Push-Pull Clock frequency (max) (MHz) 110 IOL (max) (mA) 20 IOH (max) (mA) -1 Supply current (max) (µA) 90000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) 0 to 70 Rating Catalog
Number of channels 8 Technology family F Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type Push-Pull Clock frequency (max) (MHz) 110 IOL (max) (mA) 20 IOH (max) (mA) -1 Supply current (max) (µA) 90000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) 0 to 70 Rating Catalog
PDIP (N) 20 228.702 mm² 24.33 x 9.4 SOIC (DW) 20 131.84 mm² 12.8 x 10.3
  • Contains Eight D-Type Flip-Flops With Single-Rail Outputs
  • Clock Enable Latched to Avoid False Clocking
  • Applications Include:
  • Buffer/Storage Registers
  • Shift Registers
  • Pattern Generators
  • Buffered Common Enable Input
  • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs

 

  • Contains Eight D-Type Flip-Flops With Single-Rail Outputs
  • Clock Enable Latched to Avoid False Clocking
  • Applications Include:
  • Buffer/Storage Registers
  • Shift Registers
  • Pattern Generators
  • Buffered Common Enable Input
  • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs

 

The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The SN74F377A features a latched clock enable () input.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if is low. Clock triggering occurs at a particular voltage level and is not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the input.

The SN74F377A is characterized for operation from 0°C to 70°C.

 

 

The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The SN74F377A features a latched clock enable () input.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if is low. Clock triggering occurs at a particular voltage level and is not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the input.

The SN74F377A is characterized for operation from 0°C to 70°C.

 

 

下載

您可能會感興趣的類似產品

open-in-new 比較替代產品
引腳對引腳且具備與所比較裝置相同的功能
SN74HC377 現行 具有時脈賦能端的八路 D 型正反器 Voltage range (2V to 6V), average drive strength (8mA), average propagation delay (20ns)

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 1
類型 標題 日期
* Data sheet Octal D-Type Flip-Flop With Clock Enable datasheet (Rev. D) 1993年 10月 1日

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​