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邏輯和電壓轉換
正反器、鎖存器和暫存器
移位暫存器

SN74HCS594

現行

具有施密特觸發器輸入和輸出暫存器的八位元移位暫存器

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產品規格表

SN74HCS594

現行
產品規格表 立即訂購

產品詳細資料

Configuration Serial-in, Parallel-out Bits (#) 8 Technology family HCS Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type Schmitt-Trigger Output type Push-Pull Clock frequency (MHz) 68 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Output register, Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Catalog
Configuration Serial-in, Parallel-out Bits (#) 8 Technology family HCS Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type Schmitt-Trigger Output type Push-Pull Clock frequency (MHz) 68 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Output register, Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Catalog
SOIC (D) 16 59.4 mm² 9.9 x 6 SOT-23-THN (DYY) 16 8.4 mm² 4.2 x 2 TSSOP (PW) 16 32 mm² 5 x 6.4 WQFN (BQB) 16 8.75 mm² 3.5 x 2.5
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • Extended ambient temperature range: –40°C to +125°C, TA
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • Extended ambient temperature range: –40°C to +125°C, TA

The SN74HCS594 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt triggers, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel outputs. Separate clocks and direct overriding clear (SRCLR, RCLR) inputs are provided for both the shift and storage register. A serial output (QH’) is provided for cascading.

Both the shift register (SRCLK) and storage register (RCLK) clocks are positive edge triggered. If both clocks are connected together, the shift register is one count pulse ahead of the storage register.

The SN74HCS594 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt triggers, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel outputs. Separate clocks and direct overriding clear (SRCLR, RCLR) inputs are provided for both the shift and storage register. A serial output (QH’) is provided for cascading.

Both the shift register (SRCLK) and storage register (RCLK) clocks are positive edge triggered. If both clocks are connected together, the shift register is one count pulse ahead of the storage register.
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類型 標題 日期
* Data sheet SN74HCS594 8-Bit Shift Register With Schmitt-Trigger Inputs and Output Registers datasheet (Rev. A) PDF | HTML 2021年 5月 25日

設計與開發

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開發板

14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組

14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。

使用指南: PDF | HTML
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開發板

14-24-NL-LOGIC-EVM — 適用於 14 針腳至 24 針腳無引線封裝的邏輯產品通用評估模組

14-24-NL-LOGIC-EVM 是一款靈活的評估模組 (EVM)，設計用途可支援任何具有 14 針腳至 24 針腳 BQA、BQB、RGY、RSV、RJW 或 RHL 封裝的邏輯或轉換裝置。

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模擬型號

SN74HCS594 IBIS Model (Rev. B)

SCEM771B.ZIP (251 KB) - IBIS Model
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 16 Ultra Librarian
SOT-23-THN (DYY) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
WQFN (BQB) 16 Ultra Librarian
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  • 進行中持續性的可靠性監測
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