封裝資訊
| 封裝 | 針腳 TSSOP (PW) | 14 |
| 操作溫度範圍 (°C) -55 to 125 |
| 包裝數量 | 運送業者 3,000 | LARGE T&R |
SN74LV14B-EP 的特色
- 2 V to 5.5 V V CC operation
- Maximum t pd of 14 ns at 5 V
- Supports mixed-mode voltage operation on all ports
- I off supports partial-power-down mode operation
- Latch-up performance exceeds 250 mA per JESD 17
- Operating ambient temperature: -55°C to +125°C
- Supports defense, aerospace, and medical applications:
- Controlled baseline
- One assembly and test site
- One fabrication site
- Extended product life cycle
- Product traceability
SN74LV14B-EP 的說明
The SN74LV14B-EP device contains six independent Inverter with Schmitt-trigger inputs designed for 2 V to 5.5 V V CC operation. Each gate performs the Boolean function Y = A in positive logic.
This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.