封裝資訊
封裝 | 針腳 TSSOP (PW) | 14 |
操作溫度範圍 (°C) -40 to 125 |
包裝數量 | 運送業者 2,000 | LARGE T&R |
SN74LV74A 的特色
- 2-V to 5.5-V VCC Operation
- Maximum tpd of 8.5 ns at 5 V
- Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C - Typical VOHV (Output VOH Undershoot)
> 2.3 V at VCC = 3.3 V, TA = 25°C - Support Mixed-Mode Voltage Operation on
All Ports - Ioff Supports Partial-Power-Down
Mode Operation - Latch-up Performance Exceeds 250 mA
Per JESD 17 - ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 500-V Charged-Device Model (C101)
SN74LV74A 的說明
These dual positive-edge-triggered D-type flip-flops are designed for 2-V to 5.5-V VCC operation.