TPA5051
- Digital Audio Format: 16-24-bit I2S, Right-Justified, Left-Justified
- I2C Bus Controlled
- Dual Serial Input Ports
- Delay Time: 85 ms/ch at fs = 48 kHz
- Delay Resolution: One Sample
- Delay Memory Cleared on Power-Up or After Delay Changes
- Eliminates Erroneous Data on Output
- 3.3 V Operation With 5 V Tolerant I/O and I2C Control
- Supports Audio Bit Clock Rates of 32 to 64 fs with fs = 32 kHz-192 kHz
- No External Crystal or Oscillator Required
- All Internal Clocks Generated From the Audio Clock
- Independent Clocks for Each Audio Input
- Surface Mount 4mm × 4mm, 16-pin QFN Package
- APPLICATIONS
- High Definition Lip-Sync Delay
- Flat Panel TV Lip-Sync Delay
- Home Theater Rear Channel Effects
- Wireless Speaker Front-Channel Synchronization
The TPA5051 accepts two serial audio inputs, buffers the data for a selectable period of time, and outputs the delayed audio data on two serial outputs. One device allows delay of up to 85 ms/ch (fs = 48 kHz) to synchronize the audio stream to the video stream in systems with complex video processing algorithms. If more delay is needed, the devices can be connected in series. Independent clocks can be used for each audio input.
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檢視所有 1 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | Four Channel Digital Audio Lip-Sync Delay with I2C Control datasheet (Rev. A) | 2006年 7月 20日 |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點