TPA5052
- Digital Audio Format: 16–24–bit I2S
- Single Serial Input Port
- Delay Time: 170 ms/ch at fs = 48 kHz
- Delay Resolution: 256 samples
- Delay Memory Cleared on Power–Up or After Delay Changes
- Eliminates Erroneous Data From Being Output
- 3.3 V Operation With 5 V Tolerant I/O
- Supports Audio Bit Clock Rates of 32 to 64 fs with fs = 32 kHz–192 kHz
- No External Crystal or Oscillator Required
- All Internal Clocks Generated From the Audio Clock
- Surface Mount 4mm × 4mm, 16–pin QFN Package
- APPLICATIONS
- High Definition TV Lip–Sync Delay
- Flat Panel TV Lip–Sync Delay
- Home Theater Rear–Channel Effects
- Wireless Speaker Front–Channel Synchronization
- Camcorders
The TPA5052 accepts a single serial audio input, buffers the data for a selectable period of time, and outputs the delayed audio data on a single serial output. In systems with complex video processing algorithms, one device allows delay of up to 170 ms/ch (fs = 48 kHz) to synchronize the audio stream to the video stream. If more delay is needed, the devices can be connected in series.
技術文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 1 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | Stereo Digital Audio Lip-Sync Delay datasheet (Rev. A) | 2006年 8月 8日 |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點