TXB0104

現行

具自動方向感測和 +/-15-kV ESD 保護的 4 位元雙向電壓位準移位器

產品詳細資料

Technology family TXB Applications I2S, JTAG, SPI, UART Bits (#) 4 Data rate (max) (Mbps) 100 High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 1.2 Vout (max) (V) 5.5 IOH (max) (mA) -0.02 IOL (max) (mA) 0.02 Supply current (max) (µA) 10 Features Edge rate accelerator, Integrated pullup resistors, Output enable, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
Technology family TXB Applications I2S, JTAG, SPI, UART Bits (#) 4 Data rate (max) (Mbps) 100 High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 1.2 Vout (max) (V) 5.5 IOH (max) (mA) -0.02 IOL (max) (mA) 0.02 Supply current (max) (µA) 10 Features Edge rate accelerator, Integrated pullup resistors, Output enable, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YZT) 12 3.9375 mm² 2.25 x 1.75 NFBGA (NMN) 12 5 mm² 2 x 2.5 SOIC (D) 14 51.9 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4 UQFN (RUT) 12 3.4 mm² 2 x 1.7 VQFN (RGY) 14 12.25 mm² 3.5 x 3.5
  • 1.2-V to 3.6-V on A port and 1.65-V to 5.5-V on B port (VCCA ≤ VCCB)
  • VCC isolation feature: if either VCC input ss at GND, all outputs are in the high-impedance state
  • Output enable (OE) input circuit referenced to VCCA
  • Low power consumption, 5-µA maximum ICC
  • I OFF supports partial power-down mode operation
  • Latch-up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port:
      • 2500-V Human-Body Model (A114-B)
      • 1500-V Charged-Device Model (C101)
    • B Port:
      • ±15-kV Human-Body Model (A114-B)
      • 1500-V Charged-Device Model (C101)
  • 1.2-V to 3.6-V on A port and 1.65-V to 5.5-V on B port (VCCA ≤ VCCB)
  • VCC isolation feature: if either VCC input ss at GND, all outputs are in the high-impedance state
  • Output enable (OE) input circuit referenced to VCCA
  • Low power consumption, 5-µA maximum ICC
  • I OFF supports partial power-down mode operation
  • Latch-up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port:
      • 2500-V Human-Body Model (A114-B)
      • 1500-V Charged-Device Model (C101)
    • B Port:
      • ±15-kV Human-Body Model (A114-B)
      • 1500-V Charged-Device Model (C101)

This TXB0104 4-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. VCCA must not exceed VCCB.

When the OE input is low, all outputs are placed in the high-impedance state. To ensure the high-impedance state during power up or power down, OE must be tied to GND through a pulldown resistor The current sourcing capability of the driver determines the minimum value of the resistor.

The TXB0104 device is designed so the OE input circuit is supplied by VCCA.

This device is fully specified for partial power-down applications using I OFF. The I OFF circuitry disables the outputs, which prevents damaging current backflow through the device when the device is powered down.

This TXB0104 4-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. VCCA must not exceed VCCB.

When the OE input is low, all outputs are placed in the high-impedance state. To ensure the high-impedance state during power up or power down, OE must be tied to GND through a pulldown resistor The current sourcing capability of the driver determines the minimum value of the resistor.

The TXB0104 device is designed so the OE input circuit is supplied by VCCA.

This device is fully specified for partial power-down applications using I OFF. The I OFF circuitry disables the outputs, which prevents damaging current backflow through the device when the device is powered down.

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TXB0108 現行 具自動方向感測和 +/-15-kV ESD 保護的 8 位元雙向電壓位準移位器 Same function in 8-channel version

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類型 標題 日期
* Data sheet TXB0104 4-Bit Bidirectional Voltage-Level Translator With Automatic Direction Sensing and ±15-kV ESD Protection datasheet (Rev. J) PDF | HTML 2020年 10月 2日
Application note Overcoming TXB-Type Translators Design Challenges PDF | HTML 2024年 9月 18日
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024年 7月 12日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Application note Leveraging Edge Rate Accelerators with Auto-Sensing Level Shifters PDF | HTML 2023年 9月 29日
Application brief Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages PDF | HTML 2023年 9月 5日
Application note Do’s and Don’ts for TXB and TXS Voltage Level-Shifters with Edge Rate Accelerato PDF | HTML 2023年 6月 28日
Product overview Enabling System on Module Industrial PC Connectivity With Level Translation PDF | HTML 2023年 4月 3日
Application brief Enabling Smart Solar Inverter Designs with Level Translation PDF | HTML 2022年 10月 31日
EVM User's guide TXB-EVM Evaluation Module User's Guide (Rev. A) PDF | HTML 2021年 8月 2日
Selection guide Voltage Translation Buying Guide (Rev. A) 2021年 4月 15日
Application note Optimizing Video Doorbell Designs with Common Logic Use Cases (Rev. A) PDF | HTML 2021年 4月 1日
Application note 2N7001T Voltage Level Translator for SPI, UART, JTAG Interface (Rev. A) PDF | HTML 2021年 3月 29日
Application note Effects of pullup and pulldown resistors on TXS and TXB devices (Rev. A) 2018年 3月 28日
Application note Factors Affecting VOL for TXS and LSF Auto-bidirectional Translation Devices 2017年 11月 19日
Application note Biasing Requirements for TXS, TXB, and LSF Auto-Bidirectional Translators 2017年 10月 30日
Application note A Guide to Voltage Translation With TXS-Type Translators 2010年 6月 29日
Application note A Guide to Voltage Translation With TXB-Type Translators 2010年 3月 3日

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模擬型號

HSPICE Model for TXB0104

SCEJ249.ZIP (109 KB) - HSpice Model
模擬型號

TXB0104 IBIS Model (Rev. C)

SCEM517C.ZIP (208 KB) - IBIS Model
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
DSBGA (YZT) 12 Ultra Librarian
NFBGA (NMN) 12 Ultra Librarian
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
UQFN (RUT) 12 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian

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  • 產品標記
  • 鉛塗層/球物料
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  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
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