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邏輯和電壓轉換
電壓轉換器及電平移位器
方向控制電壓轉換器

TXV0108

現行

雙電源方向控制八通道電壓轉換器

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產品規格表

TXV0108

現行
產品規格表 立即訂購

產品詳細資料

Technology family AVC Applications GPIO, JTAG, SPI, UART Bits (#) 8 High input voltage (min) (V) 1.08 High input voltage (max) (V) 3.6 Vout (min) (V) 1.65 Vout (max) (V) 3.63 Data rate (max) (Mbps) 0.25 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 16 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AVC Applications GPIO, JTAG, SPI, UART Bits (#) 8 High input voltage (min) (V) 1.08 High input voltage (max) (V) 3.6 Vout (min) (V) 1.65 Vout (max) (V) 3.63 Data rate (max) (Mbps) 0.25 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 16 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State Rating Catalog Operating temperature range (°C) -40 to 125
VQFN (RGY) 24 19.25 mm² 5.5 x 3.5
  • Configurable design allows each port to operate with a power supply range from 1.14V to 3.6V
  • Supports up to 500Mbps for 1.65V to 3.6V
  • Meets RGMII 2.0 timing specifications:
    • < 750ps rise and fall time
    • < ± 5 % duty cycle distortion
    • < ± 400 ps channel to channel skew
    • Up to 250Mbps/Channel

  • Integrated 10 Ω damping output resistor to minimize signal reflections

  • High drive strength (up to 12mA at 3.6V)

  • Fully configurable symmetric dual-rail design
  • Optimal signal integrity performance with 390ps peak-to-peak jitter for 1.8V to 3.3V
  • Features VCC isolation and VCC disconnect
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • 2000V Human-Body Model
    • 1000V Charged-Device Model
  • Low power consumption:
    • 10µA maximum (25°C)
    • 20µA maximum (–40°C to 125°C)
  • Operating temperature from –40°C to +125°C
  • Pin compatible with SN74AVC8T245 (VQFN)
  • Configurable design allows each port to operate with a power supply range from 1.14V to 3.6V
  • Supports up to 500Mbps for 1.65V to 3.6V
  • Meets RGMII 2.0 timing specifications:
    • < 750ps rise and fall time
    • < ± 5 % duty cycle distortion
    • < ± 400 ps channel to channel skew
    • Up to 250Mbps/Channel

  • Integrated 10 Ω damping output resistor to minimize signal reflections

  • High drive strength (up to 12mA at 3.6V)

  • Fully configurable symmetric dual-rail design
  • Optimal signal integrity performance with 390ps peak-to-peak jitter for 1.8V to 3.3V
  • Features VCC isolation and VCC disconnect
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • 2000V Human-Body Model
    • 1000V Charged-Device Model
  • Low power consumption:
    • 10µA maximum (25°C)
    • 20µA maximum (–40°C to 125°C)
  • Operating temperature from –40°C to +125°C
  • Pin compatible with SN74AVC8T245 (VQFN)

The TXV0108 is an 8-bit, dual-supply direction controlled low-skew, low-jitter voltage translation device. This device can be used for redriving, voltage translation, and power isolation when implementing skew sensitive interface, such as RGMII between Ethernet MAC and PHY devices. The Ax I/O pins and control pins (DIR, OE) are referenced to VCCA logic levels, and Bx I/O pins are referenced to VCCB logic levels. This device has improved channel-to-channel skew, duty cycle distortion and symmetric rise and fall time for applications requiring strict timing conditions.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, thus preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature is designed so that if either VCC supply is at or near 0V both ports will switch to a high-impedance state. This feature enables power isolation for communications across multiple MACs and PHYs, and is beneficial in situations where MACs and PHYs are powered up asynchronously preventing current backflow between devices.

A High on DIR allows data transmission from A to B while a Low on DIR allows data transmission from B to A when OE is set to Low. When OE is set to High, both Ax and Bx pins will be forced into a high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

The TXV0108 is an 8-bit, dual-supply direction controlled low-skew, low-jitter voltage translation device. This device can be used for redriving, voltage translation, and power isolation when implementing skew sensitive interface, such as RGMII between Ethernet MAC and PHY devices. The Ax I/O pins and control pins (DIR, OE) are referenced to VCCA logic levels, and Bx I/O pins are referenced to VCCB logic levels. This device has improved channel-to-channel skew, duty cycle distortion and symmetric rise and fall time for applications requiring strict timing conditions.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, thus preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature is designed so that if either VCC supply is at or near 0V both ports will switch to a high-impedance state. This feature enables power isolation for communications across multiple MACs and PHYs, and is beneficial in situations where MACs and PHYs are powered up asynchronously preventing current backflow between devices.

A High on DIR allows data transmission from A to B while a Low on DIR allows data transmission from B to A when OE is set to Low. When OE is set to High, both Ax and Bx pins will be forced into a high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.
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技術文件

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類型 標題 日期
* Data sheet TXV0108 8-Bit Direction Controlled Low-Skew, Low-Jitter Voltage Translator or Buffer datasheet (Rev. A) PDF | HTML 2024年 4月 12日
Application note Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2024年 10月 2日
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024年 7月 12日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Application brief Enabling AI Accelerators with Voltage Level Translation PDF | HTML 2024年 5月 1日
EVM User's guide TXV010xEVM Evaluation Module User's Guide PDF | HTML 2024年 2月 5日
Application note Overcoming Design Challenges - Implementing High Performance Interfaces PDF | HTML 2023年 12月 12日
Application brief Supporting Time and Skew Sensitive Interfaces with TI's TXV Level-Shifter PDF | HTML 2023年 10月 27日
Application brief Enabling Industrial and Automotive Ethernet RGMII Interfaces with Voltage Transl PDF | HTML 2023年 8月 2日

設計與開發

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開發板

14-24-NL-LOGIC-EVM — 適用於 14 針腳至 24 針腳無引線封裝的邏輯產品通用評估模組

14-24-NL-LOGIC-EVM 是一款靈活的評估模組 (EVM)，設計用途可支援任何具有 14 針腳至 24 針腳 BQA、BQB、RGY、RSV、RJW 或 RHL 封裝的邏輯或轉換裝置。

使用指南: PDF | HTML
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開發板

TXV0108-EVM — TXV0108 評估模組

TXV0108 評估模組 (EVM) 是一個易於使用的平台，用於評估 TXV0108 產品的功能與性能。此 EVM 具有選用電路和跨接器，可針對不同應用來配置產品。此產品提供固定與方向控制低偏斜、低抖動電壓轉換的選項。輸出可透過專屬的輸出啟用 (OE) 控制功能來啟用及停用。
使用指南: PDF | HTML
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模擬型號

TXV0108 IBIS Model

SCEM798.ZIP (44 KB) - IBIS Model
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VQFN (RGY) 24 Ultra Librarian
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  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

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