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High performance computing

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High performance computing

Block diagram

Overview

Our integrated circuits and reference designs help you create high-performance computing systems to meet many custom configurations. Simplify your design and meet the latest high-bandwidth data transfer protocols with our highly efficient power converters and advanced protection devices.

Design requirements

Today's high-performance computing designs require:

  • Reliable and redundant intermediate bus voltage (IBV) converter and protection.
  • High-bandwidth and low-latency data transfers.
  • Advanced system protection from external events and fault conditions.
Explore applications similar in function and design

Block diagram

Find products and reference designs for your system.

High performance computing

Accelerator add-in card Accelerator add-in card 12V/48V 12V/48V PCIe PCIe 12V (bypass) 12V (bypass) IBV2 IBV2 JTAG JTAG Multiple CPU Sockets Multiple CPU Sockets IBV converter & protection IBV converter & protection MOSFETs MOSFETs Hotswap/ eFuse Hotswap/ eFuse DC/DC controller DC/DC controller ESD ESD POL power (FPGA, ASIC, merchant Si, clocks, etc.) POL power (FPGA, ASIC, merchant Si, clocks, etc.) Multiphase controller Multiphase controller Power stage Power stage Buck converter Buck converter LDO LDO CPU & memory power CPU & memory power Power stage Power stage Multi-phase controller Multi-phase controller Supervisor Supervisor Buck converter Buck converter Sequencing & monitoring Sequencing & monitoring Power on reset Power on reset Sequencer Sequencer CPLD CPLD Vref Vref Memory Memory EEPROM EEPROM DDR termination DDR termination DIMM modules DIMM modules Flash Flash Sensing Sensing Temperature sensing Temperature sensing Current sensing Current sensing Power monitor Power monitor CPU & digital processing CPU & digital processing GPIO expander GPIO expander PCIe switch PCIe switch PCH PCH PCIe PHY, bridges PCIe PHY, bridges I2C function I2C function Retimers, redrivers Retimers, redrivers CPU CPU BMC BMC Logic & control Logic & control Comparators Comparators Buffer Buffer Switches/MUX Switches/MUX Level shifter Level shifter Logic gate Logic gate Op amp Opamp Communication interfaces I/O Communication interfaces I/O USB redrivers USB redrivers SAS/SATA redriver SAS/SATA redriver JTAG MUX JTAGMUX RS-232, RS-485 RS-232,RS-485 Video, SPI mux Video, SPI mux ADC ADC UART UART Ethernet interface Ethernet interface Ethernet, retimers, redrivers, port controllers Ethernet, retimers, redrivers, port controllers Ethernet PHY Ethernet PHY Clocking Clocking Clock generator Clock generator Oscillator Oscillator Buffer Buffer

Clocking

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Clock and timing circuitry that provides the ability to offer time and frequency synchronization. These signals can be challenging to generate and to route across the board, therefore clock buffers are used to distribute the clock signals with low skew.

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Clocks & timing (11)
Clock generators
  • LMK3H0102—Bulk acoustic wave (BAW)-based PCIe Gen 1 to Gen 7-compliant referenceless clock generator
    Data sheet: PDF | HTML
Real-time clocks (RTCs) & timers
  • LMC555—World’s smallest 555 timer with low power, high accuracy and a Fmax of 3MHz
    Data sheet: PDF | HTML
  • NE555—Single Precision Timer
    Data sheet: PDF | HTML
  • TLC555—2.1-MHz, 250-µA, Low-Power Timer
    Data sheet: PDF | HTML
Clock buffers
  • LMKDB1104—4-output LP-HCSL clock buffer for PCIe Gen 1 to Gen 6
    Data sheet: PDF | HTML
  • LMKDB1120—DB2000QL-compliant 20-output clock buffer for PCIe Gen 1 to Gen 6
    Data sheet: PDF | HTML
  • CDCLVD1208—Low jitter, 2-input selectable 1:8 universal-to-LVDS buffer
    Data sheet: PDF | HTML
  • CDCLVC1102—Low jitter, 1:2 LVCMOS fan-out clock buffer
    Data sheet: PDF | HTML
  • CDCLVP1102—Low jitter 1:2 universal-to-LVPECL buffer
    Data sheet: PDF | HTML
  • LMKDB1102—2-output LP-HCSL clock buffer for PCIe Gen 1 to Gen 6
    Data sheet: PDF | HTML
Oscillators
  • LMK6D—Low-jitter, high-performance, bulk-acoustic-wave (BAW) fixed-frequency LVDS oscillator
    Data sheet: PDF | HTML

    Technical documentation

    View all 16
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    Type Title Date
    Analog Design Journal System telemetry: What, why and how? 30 Apr 2014
    Application note A Guide to Voltage Translation With TXS-Type Translators 29 Jun 2010
    Application note How to Select Little Logic (Rev. A) 26 Jul 2016
    More literature Advanced Signal Conditioning Made Easy and Efficient 24 Jan 2017
    Technical article Voltage regulator features – inside the black box PDF | HTML 16 Aug 2023
    Technical article Powering Intel’s Xeon D SoC in servers, storage and switches PDF | HTML 14 Sep 2023
    Technical article How to protect your server from hot swap events PDF | HTML 12 Sep 2023
    Application note Low Voltage Translation for SPI, UART, RGMII, JTAG Interfaces (Rev. B) PDF | HTML 11 May 2022
    Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 10 May 2022
    Application brief Enabling SPI-Based Flash Memory Expansion by Using Multiplexers (Rev. B) PDF | HTML 10 May 2022
    Analog Design Journal Comparing internally-compensated advanced current mode (ACM) w/ D-CAP3™ control (Rev. A) 06 Nov 2018
    Application note Advanced Linear Repeater Used in PCIe 3.0 Add-in Card Compliance Environment 03 Oct 2014
    Application note Achieve 20-A Circuit Protection and Space Efficiency Using Paralleled eFuses 03 Nov 2016
    User guide SigCon Architect: Installation and Starter’s Guide (Rev. A) 03 Jun 2016
    Analog Design Journal The intricacies of signal integrity in high-speed communications 02 May 2016
    White paper Solving CMOS Transition Rate Issues Using Schmitt Trigger Solution (Rev. A) 01 May 2017

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