Abstract

This application note addresses the capacitive loads presented by electrostatic discharge (ESD) protection diodes to high-speed signals. With the industry trend towards smaller chipset sizes with higher data rates, the chipset’s tolerance to transient voltages has decreased, increasing the need for ESD protection diodes. Higher data rates are very sensitive to parasitic capacitance, as a large capacitance can cause impedance mismatches. A large capacitance can distort the signal and cause the data to become corrupted or unreadable. For high speed signals, the ESD protection diodes need to have an ultra-low capacitance to not disrupt the signal transmission. With this dynamic, it becomes important to understand how much capacitance a high-speed signal can tolerate and still maintain proper signal integrity.