As can be seen in Figure 2-2, the CC regulation scheme is composed of a current sense resistor and a differential amplifier. As the output current flows through the current sense resistor it generates a differential voltage which is amplified and level shifted to a voltage referenced to ground. The voltage referenced to ground is proportional to the output current flowing through the current sense resistor. When the loop is in regulation, the FB pin voltage is equal to the internal reference of the regulator.

Figure 2-2 External CC Circuit

Equation 1 shows the relationship between the voltage sensed across the current sense resistor, the output current and the gain of the differential amplifier.

I_out is the output current, R_sense is the current sense resistance and K is the gain of the differential amplifier. Equation 2 is holds true when R₁ = R₂, R₃ = R₄.

For most converters with PCM control, when in regulation, the FB pin voltage is equal to its internal reference of the error amplifier (V_ref). Note that the reference voltage can vary between products. For example, the V_ref of TPSM63610 and the LM5149 is 1V and 0.8V respectively.

Combining Equation 1, Equation 2 and Equation 3 which consists of the gain of the differential amplifier, the current sense resistor value and the reference of the regulator in use, the output current can be set to the desired level. Equation 4 calculates the power loss in the selected current sense resistor.

Higher losses not only increase the operating temperature but also reduce system efficiency, because all of the output current will flow through R_sense. Generally speaking, consider the current sense resistor package size and power losses, the resistance cannot be too high. A current sense resistor value of 10 mΩ was selected and the results of the the experiments are published in this application note. The values ​​of capacitors C₂ and C₃ in the differential amplifier circuit are related to the CC circuit loop. Since both the CC and CV circuits are added to the FB pin, to stabilize the loop, it is necessary to slow down the CC loop as much as possible. We recommend that the values ​​of C₂ and C₃ be between 1 nF and 10 nF.

For example, assume that I_out = 8 A and R_sense = 10 mΩ. When we use this circuit on TPSM63610EVM or LM61495EVM, because the V_ref = 1 V, using Equation 1 through Equation 3, we can get that with R₁ = R₂ = 1 kΩ, R₃ = R₄ = 12.5 kΩ.

The operational amplifiers in the CC and CV circuits can be powered by an external LDO, and the power supply voltage is 5 V. But in practical applications, if the output voltage of the VCC pin of the chip is also 5 V, we can directly use the VCC pin to power the op amp. Note that the VCC pin has a current limit, so a 1 kΩ resistor (R₅ in Figure 2-2) needs to be added to the output of the CC circuit to limit the current.

In addition, the above circuit uses low side current sensing, and the two ends of the R_sense are GND_in and GND_out. High side current sensing can also be used, and the two ends of the R_sense are V_{out_in} and V_out. In this way, it is necessary to choose the appropriate op amp according to the output voltage, mainly considering the power supply range of the op amp and the common mode (CM) voltage range.