SPRAAR7J November   2018  – February 2023 66AK2G12 , AM1806 , AM1808 , AM2431 , AM2432 , AM2434 , AM3351 , AM3352 , AM3354 , AM3356 , AM3357 , AM3358 , AM3358-EP , AM3359 , AM3871 , AM3874 , AM3892 , AM3894 , AM4376 , AM4377 , AM4378 , AM4379 , AM5706 , AM5708 , AM5716 , AM5718 , AM5726 , AM5728 , AM5729 , AM5746 , AM5748 , AM5749 , AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP , AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62P , AM62P-Q1 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442 , AM6526 , AM6528 , AM6546 , AM6548 , BQ24392-Q1 , HD3SS6126 , LP8727 , OMAP-L137 , OMAP5912 , TMS320C6745 , TMS320DM355 , TMS320DM365 , TMS320DM368 , TMS320DM369 , TMS320DM6441 , TMS320DM6443 , TMS320DM6446 , TMS320DM6467 , TMS320DM8127 , TMS320DM8147 , TMS320DM8148 , TMS320DM8165 , TMS320DM8167 , TMS320DM8168 , TMS320VC5506 , TMS320VC5507 , TMS320VC5509A , TS3USB221A-Q1 , TS3USBA225 , TSU5511 , TSU5611 , TSU6111 , TSU6111A , TSU6721 , TSU8111

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Scope
    2. 1.2 Critical Signals
  4. 2General High-Speed Signal Routing
    1. 2.1 PCB Fiber Weave Mitigation
    2. 2.2 High-Speed Signal Trace Lengths
    3. 2.3 High-Speed Signal Trace Length Matching
    4. 2.4 High-Speed Signal Reference Planes
  5. 3High-Speed Differential Signal Routing
    1. 3.1  Differential Signal Spacing
    2. 3.2  High-Speed Differential Signal Rules
    3. 3.3  Symmetry in the Differential Pairs
    4. 3.4  Crosstalk Between the Differential Signal Pairs
    5. 3.5  Connectors and Receptacles
    6. 3.6  Via Discontinuity Mitigation
    7. 3.7  Back-Drill Stubs
    8. 3.8  Increase Via Anti-Pad Diameter
    9. 3.9  Equalize Via Count
    10. 3.10 Surface-Mount Device Pad Discontinuity Mitigation
    11. 3.11 Signal Bending
    12. 3.12 Suggested PCB Stackups
    13. 3.13 ESD/EMI Considerations
    14. 3.14 ESD/EMI Layout Rules
  6. 4References
  7.   A Device Layout Parameters
  8.   Revision History

3.12 Suggested PCB Stackups

TI recommends a PCB of at least six layers. #GUID-2F542943-9F4A-4BB9-B015-CEE6A2B2D111/SPRAAR79476 provides example PCB stackups.

Table 3-1 Example PCB Stackups
6-LAYER8-LAYER10-LAYER
SIGNALSIGNALSIGNAL
GROUNDGROUNDGROUND
SIGNAL(1)SIGNALSIGNAL(1)
SIGNAL(1)SIGNALSIGNAL(1)
POWER/GROUND(2)POWER/GROUND(2)POWER
SIGNALSIGNALPOWER/GROUND(2)
GROUNDSIGNAL(1)
SIGNALSIGNAL(1)
GROUND
SIGNAL
(1) Route directly adjacent signal layers at a 90° offset to each other
(2) Plane may be split depending on specific board considerations. Ensure that traces on adjacent planes do not cross splits.