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LM5106

ACTIVE

1.2-A, 1.8-A 100-V half bridge gate driver with 8V-UVLO and programmable dead-time

Product details

Bootstrap supply voltage (max) (V) 100 Power switch MOSFET Input supply voltage (min) (V) 8 Input supply voltage (max) (V) 14 Peak output current (A) 1.8 Operating temperature range (°C) -40 to 125 Undervoltage lockout (typ) (V) 8 Rating Catalog Propagation delay time (µs) 0.032 Rise time (ns) 15 Fall time (ns) 10 Iq (mA) 0.01 Input threshold TTL Channel input logic TTL Switch node voltage (V) -1 Features Dead time control Driver configuration Dual, Single
Bootstrap supply voltage (max) (V) 100 Power switch MOSFET Input supply voltage (min) (V) 8 Input supply voltage (max) (V) 14 Peak output current (A) 1.8 Operating temperature range (°C) -40 to 125 Undervoltage lockout (typ) (V) 8 Rating Catalog Propagation delay time (µs) 0.032 Rise time (ns) 15 Fall time (ns) 10 Iq (mA) 0.01 Input threshold TTL Channel input logic TTL Switch node voltage (V) -1 Features Dead time control Driver configuration Dual, Single
VSSOP (DGS) 10 14.7 mm² 3 x 4.9 WSON (DPR) 10 16 mm² 4 x 4
  • Drives Both a High-Side and Low-Side N-Channel
    MOSFET
  • 1.8-A Peak Output Sink Current
  • 1.2-A Peak Output Source Current
  • Bootstrap Supply Voltage Range up to 118-V DC
  • Single TTL Compatible Input
  • Programmable Turn-On Delays (Dead-Time)
  • Enable Input Pin
  • Fast Turn-Off Propagation Delays (32 ns Typical)
  • Drives 1000 pF with 15-ns Rise and 10-ns Fall Time
  • Supply Rail Under-Voltage Lockout
  • Low Power Consumption
  • WSON-10 (4 mm × 4 mm) and VSSOP-10 Package
  • Drives Both a High-Side and Low-Side N-Channel
    MOSFET
  • 1.8-A Peak Output Sink Current
  • 1.2-A Peak Output Source Current
  • Bootstrap Supply Voltage Range up to 118-V DC
  • Single TTL Compatible Input
  • Programmable Turn-On Delays (Dead-Time)
  • Enable Input Pin
  • Fast Turn-Off Propagation Delays (32 ns Typical)
  • Drives 1000 pF with 15-ns Rise and 10-ns Fall Time
  • Supply Rail Under-Voltage Lockout
  • Low Power Consumption
  • WSON-10 (4 mm × 4 mm) and VSSOP-10 Package

The LM5106 is a high voltage gate driver designed to drive both the high side and low side N-Channel MOSFETs in a synchronous buck or half bridge configuration. The floating high side driver is capable of working with rail voltages up to 100V. The single control input is compatible with TTL signal levels and a single external resistor programs the switching transition dead-time through tightly matched turn-on delay circuits. The robust level shift technology operates at high speed while consuming low power and provides clean output transitions. Under-voltage lockout disables the gate driver when either the low side or the bootstrapped high side supply voltage is below the operating threshold. The LM5106 is offered in the VSSOP-10 or thermally enhanced 10-pin WSON plastic package.

The LM5106 is a high voltage gate driver designed to drive both the high side and low side N-Channel MOSFETs in a synchronous buck or half bridge configuration. The floating high side driver is capable of working with rail voltages up to 100V. The single control input is compatible with TTL signal levels and a single external resistor programs the switching transition dead-time through tightly matched turn-on delay circuits. The robust level shift technology operates at high speed while consuming low power and provides clean output transitions. Under-voltage lockout disables the gate driver when either the low side or the bootstrapped high side supply voltage is below the operating threshold. The LM5106 is offered in the VSSOP-10 or thermally enhanced 10-pin WSON plastic package.

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Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

LM5106 PSpice Transient Model (Rev. C)

SNVM167C.ZIP (45 KB) - PSpice Model
Simulation model

LM5106 TINA-TI Transient Reference Design (Rev. B)

SNVM382B.TSC (577 KB) - TINA-TI Reference Design
Simulation model

LM5106 TINA-TI Transient Spice Model (Rev. A)

SNVM381A.ZIP (11 KB) - TINA-TI Spice Model
Simulation model

LM5106 Unencrypted PSpice Transient Model (Rev. A)

SNVMAC8A.ZIP (2 KB) - PSpice Model
Calculation tool

SNVR521 LM51xx Schematic Review Template

Supported products & hardware

Supported products & hardware

Products
Half-bridge drivers
LM25101 3-A, 2-A or 1-A half bridge gate driver with 8-V UVLO and TTL inputs LM5100A 3-A, 100-V half bridge gate driver with 8-V UVLO and CMOS inputs LM5100B 2-A, 100-V half bridge gate driver with 8-V UVLO and CMOS inputs LM5100C 1-A, 100-V half bridge gate driver with 8-V UVLO and CMOS Imputs LM5101 High voltage high side and low side gate driver LM5101A 3-A, 100-V half bridge gate driver with 8-V UVLO and TTL inputs LM5101B 2-A, 100-V half bridge gate driver with 8-V UVLO and TTL inputs LM5101C 1-A, 100-V half bridge gate driver with 8-V UVLO and TTL Imputs LM5102 2-A, 100-V half bridge gate driver with 8-V UVLO and programmable delay LM5104 2-A, 100-V half bridge gate driver with 8-V UVLO and adaptive delay LM5106 1.2-A, 1.8-A 100-V half bridge gate driver with 8V-UVLO and programmable dead-time LM5107 1.4-A, 100-V half bridge gate driver with 8-V UVLO LM5108 2.6-A, 110-V half bridge gate driver with enable and interlock LM5109A 1-A, 100-V half bridge gate driver with 8-V UVLO LM5109B 1-A, 100-V half bridge gate driver with 8-V UVLO and high noise immunity
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Reference designs

PMP40182 — Bi-Directional Battery Initialization System Power Board Reference Design

This reference design is a battery initialization reference design solution for automotive and battery applications. The module enables a high efficiency single stage conversion for charging and discharging the battery. This design features a 0.1% accurate current control loop using the high (...)
Test report: PDF
Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
VSSOP (DGS) 10 Ultra Librarian
WSON (DPR) 10 Ultra Librarian

Ordering & quality

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Information included:
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