Detalles del producto

Sampling rate (max) (kHz) 192 Control interface I2C Architecture Class-D Operating temperature range (°C) -40 to 85 Rating Catalog
Sampling rate (max) (kHz) 192 Control interface I2C Architecture Class-D Operating temperature range (°C) -40 to 85 Rating Catalog
VQFN (RHB) 32 25 mm² 5 x 5
  • Stereo Audio DAC with 95-dB SNR
  • Supports 8-kHz to 192-kHz Sample Rates
  • Mono Class-D BTL Speaker Driver (2.5 W Into 4-Ω or 1.6 W Into 8-Ω)
  • Two Single-Ended Inputs With Mixing and Output Level Control
  • Stereo Headphone/Lineout and Mono Class-D Speaker Outputs Available
  • Microphone Bias
  • Headphone Detection
  • 25 Built-in Digital Audio Processing Blocks (PRB_P1 – PRB_P25) Providing Biquad and FIR Filters, DRC, and 3-D Structures
  • Digital Mixing Capability
  • Pin Control or Register Control for Digital-Playback Volume-Control Settings
  • Digital Sine-Wave Generator for Beeps and Key Clicks (PRB_P25)
  • Programmable PLL for Flexible Clock Generation
  • I2S, Left-Justified, Right-Justified, DSP, and TDM Audio Interfaces
  • I2C Control With Register Auto-Increment
  • Full Power-Down Control
  • Power Supplies:
    • Analog: 2.7 V–3.6 V
    • Digital Core: 1.65 V–1.95 V
    • Digital I/O: 1.1 V–3.6 V
    • Class-D: 2.7 V–5.5 V (SPKVDD ≥ AVDD)
  • 5-mm × 5-mm 32-VQFN Package
  • Stereo Audio DAC with 95-dB SNR
  • Supports 8-kHz to 192-kHz Sample Rates
  • Mono Class-D BTL Speaker Driver (2.5 W Into 4-Ω or 1.6 W Into 8-Ω)
  • Two Single-Ended Inputs With Mixing and Output Level Control
  • Stereo Headphone/Lineout and Mono Class-D Speaker Outputs Available
  • Microphone Bias
  • Headphone Detection
  • 25 Built-in Digital Audio Processing Blocks (PRB_P1 – PRB_P25) Providing Biquad and FIR Filters, DRC, and 3-D Structures
  • Digital Mixing Capability
  • Pin Control or Register Control for Digital-Playback Volume-Control Settings
  • Digital Sine-Wave Generator for Beeps and Key Clicks (PRB_P25)
  • Programmable PLL for Flexible Clock Generation
  • I2S, Left-Justified, Right-Justified, DSP, and TDM Audio Interfaces
  • I2C Control With Register Auto-Increment
  • Full Power-Down Control
  • Power Supplies:
    • Analog: 2.7 V–3.6 V
    • Digital Core: 1.65 V–1.95 V
    • Digital I/O: 1.1 V–3.6 V
    • Class-D: 2.7 V–5.5 V (SPKVDD ≥ AVDD)
  • 5-mm × 5-mm 32-VQFN Package

The TLV320DAC3100 device is a low-power, highly integrated, high-performance stereo audio DAC with 24-bit stereo playback and digital audio processing blocks.

The device integrates headphone drivers and speaker drivers. The mono speaker driver can drive loads down to 4 Ω. The TLV320DAC3100 device has a suite of built-in processing blocks for digital audio processing. The digital audio data format is programmable to work with popular audio standard protocols (I2S, left/right-justified) in master, slave, DSP, and TDM modes. Bass boost, treble, or EQ can be supported by the programmable digital signal-processing block. An on-chip PLL provides the high-speed clock needed by the digital signal-processing block. The volume level can be controlled either by pin control or by register control. The audio functions are controlled using the I2C serial bus.

The TLV320DAC3100 device has a programmable digital sine-wave generator and is available in a 32-pin VQFN package.

The TLV320DAC3100 device is a low-power, highly integrated, high-performance stereo audio DAC with 24-bit stereo playback and digital audio processing blocks.

The device integrates headphone drivers and speaker drivers. The mono speaker driver can drive loads down to 4 Ω. The TLV320DAC3100 device has a suite of built-in processing blocks for digital audio processing. The digital audio data format is programmable to work with popular audio standard protocols (I2S, left/right-justified) in master, slave, DSP, and TDM modes. Bass boost, treble, or EQ can be supported by the programmable digital signal-processing block. An on-chip PLL provides the high-speed clock needed by the digital signal-processing block. The volume level can be controlled either by pin control or by register control. The audio functions are controlled using the I2C serial bus.

The TLV320DAC3100 device has a programmable digital sine-wave generator and is available in a 32-pin VQFN package.

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Documentación técnica

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* Data sheet TLV320DAC3100 Low-Power Stereo Audio DAC With Audio Processing and Mono Class-D Speaker Amplifier datasheet (Rev. C) PDF | HTML 24 ene 2017
Application note Audio Serial Interface Configurations for Audio Codecs (Rev. A) 27 jun 2019
Application note PLL and Clocking Configuration for Audio Devices PDF | HTML 26 mar 2019
Application note TLV320AIC31xx and TLV320DAC31xx Power Consumption Characterization (Rev. B) 03 sep 2014
Application note TLV320DAC3100 Open Load Detection Test (Rev. B) 27 jul 2013
Application note TLV320DAC3100 Open Load Detection Test (Rev. A) 26 abr 2013
Application note Coefficient RAM Access Mechanisms.. (Rev. D) 25 ene 2012
Application note Audio Serial Interface Configurations for Audio Codecs 22 sep 2010
Application note Interfacing an I2S Device to an MSP430 Device (Rev. A) 22 mar 2010
EVM User's guide ACEV-1A EVM User's Guide 17 dic 2009

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

TLV320DAC3100EVM-U — Módulo de evaluación TLV320DAC3100EVM-U

The TLV320DAC3100EVM-U (ACEV-1A) is a complete evaluation module for the TLV320DAC3100 audio codec.

The EVM is supported by TI’s CodecControl software, a block-diagram based graphical user interface for TI audio codec’s.

The TLV320DAC3100EVM-U connects to a USB port of a PC. The USB interface (...)

Guía del usuario: PDF
Controlador o biblioteca

TLV320DAC31XX-DRIVERS — Compatibilidad con controladores Linux de la familia DAC TLV320DAC31XX

These Linux drivers support our low-power audio digital-to-analog converters (DACs) in the TLV320DAC31xx device family, and include both .c and .h files. The "Go to third party" buttons below will allow you to downlod the appropriate drivers from git.kernal.org.

Linux main line status
Available in (...)
Modelo de simulación

TLV320DAC3100 IBIS Model

SLAM190.ZIP (51 KB) - IBIS Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
VQFN (RHB) 32 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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Soporte y capacitación

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El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI. ​​​​​​​​​​​​​​

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