TPS7H3301-SP

Name: TPS7H3301-SP
Brand: TI
SKU: TPS7H3301-SP
Price: 4792.06 USD

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Regulador LDO con terminación DDR de 3 A, entrada de 2.3 V a 3.5 V, QMLV con protección contra la ra

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document-pdfAcrobat TPS7H3301-SP Sink and Source Radiation-Hardened 3-A DDR Termination Regulator With Built-In VTTREF Buffer datasheet (Rev. C) (Inglés) PDF | HTML

TPS7H3301-SP

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Detalles del producto

DDR memory type

DDR2, DDR3, DDR4

Control mode

S3, S4/S5

Iout VTT (max) (A)

3

Iq (typ) (mA)

18

Output

VREF, VTT

Vin (min) (V)

0.9

Vin (max) (V)

3.5

Features

Complete Solution, Shutdown Pin for S3

Rating

Space

Operating temperature range (°C)

-55 to 125

Regulator type

Linear Regulator

Vin bias (max) (V)

3.5

Vin bias (min) (V)

2.375

Vout VTT (min) (V)

0.6

DDR memory type

DDR2, DDR3, DDR4

Control mode

S3, S4/S5

Iout VTT (max) (A)

3

Iq (typ) (mA)

18

Output

VREF, VTT

Vin (min) (V)

0.9

Vin (max) (V)

3.5

Features

Complete Solution, Shutdown Pin for S3

Rating

Space

Operating temperature range (°C)

-55 to 125

Regulator type

Linear Regulator

Vin bias (max) (V)

3.5

Vin bias (min) (V)

2.375

Vout VTT (min) (V)

0.6

CFP (HKR)

16

105.6 mm² 11 x 9.6

5962R14228(1):
- Radiation hardness assurance (RHA) qualified to total ionizing dose (TID) 100 krad(Si)
- Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune to LET = 70 MeV-cm2/mg(2)
- Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized to 70 MeV-cm2/mg(2)
Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
Input voltage: supports a 2.5-V and 3.3-V rail(3)
Separate low-voltage input (VLDOIN) down to 0.9 V for improved power efficiency(3)
3-A sink and source termination regulator includes droop compensation
Enable input and power-good output for power supply sequencing
VTT termination regulator
- Output voltage range: 0.5 to 1.75 V
- 3-A sink and source current
Integrated precision voltage divider network with sense input
Remote sensing (VTTSNS)
VTTREF buffered reference
- 49% to 51% accuracy with respect to VDDQSNS (±3 mA)
- ±10-mA sink and source current
Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated

5962R14228(1):
- Radiation hardness assurance (RHA) qualified to total ionizing dose (TID) 100 krad(Si)
- Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune to LET = 70 MeV-cm2/mg(2)
- Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized to 70 MeV-cm2/mg(2)
Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
Input voltage: supports a 2.5-V and 3.3-V rail(3)
Separate low-voltage input (VLDOIN) down to 0.9 V for improved power efficiency(3)
3-A sink and source termination regulator includes droop compensation
Enable input and power-good output for power supply sequencing
VTT termination regulator
- Output voltage range: 0.5 to 1.75 V
- 3-A sink and source current
Integrated precision voltage divider network with sense input
Remote sensing (VTTSNS)
VTTREF buffered reference
- 49% to 51% accuracy with respect to VDDQSNS (±3 mA)
- ±10-mA sink and source current
Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated

The TPS7H3301-SP is a TID and SEE radiation-hardened double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3301-SP supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR4. The fast transient response of the TPS7H3301-SP VTT regulator allows for a very stable supply during read/write conditions. During transients, the fast tracking feature of the VTTREF supply minimizes any voltage offset between VTT/Vo and VTTREF. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3301-SP. The PGOOD output is open-drain so it can be tied to multiple open-drain outputs to monitor when all supplies have come into regulation. The enable signal can also be used to discharge VTT/Vo during suspend to RAM (S3) power down mode.

The TPS7H3301-SP is a TID and SEE radiation-hardened double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3301-SP supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR4. The fast transient response of the TPS7H3301-SP VTT regulator allows for a very stable supply during read/write conditions. During transients, the fast tracking feature of the VTTREF supply minimizes any voltage offset between VTT/Vo and VTTREF. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3301-SP. The PGOOD output is open-drain so it can be tied to multiple open-drain outputs to monitor when all supplies have come into regulation. The enable signal can also be used to discharge VTT/Vo during suspend to RAM (S3) power down mode.

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TPS7H3302-SEP

ACTIVO

Regulador LDO de 2.3 V a 3.5 V de entrada, 3 A de fuente y disipador con terminación DDR, con tolera -SEP plastic package with reduced TID and SEE radiation performance

TPS7H3302-SP

ACTIVO

Regulador LDO con terminación DDR de 3 A, entrada de 2.3 V a 3.5 V, QMLP con protección contra la ra QMLP plastic package with same radiation performance

Documentación técnica

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	Tipo	Título		Fecha
*	Data sheet	TPS7H3301-SP Sink and Source Radiation-Hardened 3-A DDR Termination Regulator With Built-In VTTREF Buffer datasheet (Rev. C)	PDF \| HTML	27 sep 2024
*	Radiation & reliability report	TPS7H3301-SP and TPS7H3302-SP Single-Event Effects Radiation Report (Rev. C)		26 ene 2024
*	Radiation & reliability report	TPS7H3301-SP Neutron Displacement Damage Characterization		12 abr 2019
*	SMD	TPS7H3301-SP SMD 5962-14228		08 jul 2016
*	Radiation & reliability report	TPS7H3301-SP Total Ionizing Dose Radiation Report		01 jul 2016
	Application brief	DLA Approved Optimizations for QML Products (Rev. B)	PDF \| HTML	23 oct 2024
	Selection guide	TI Space Products (Rev. J)		12 feb 2024
	Application note	Using Space Grade Power Components to Power AMD Kintex XQRKU060 FPGA	PDF \| HTML	08 nov 2023
	Application note	Using Space Grade Power Components to Power Microchip RT PolarFire FPGA	PDF \| HTML	20 sep 2023
	More literature	TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A)		31 ago 2023
	Application note	QML flow, its importance, and obtaining lot information (Rev. C)		30 ago 2023
	Application note	Space Grade Power Solution for Microsemi RTG4	PDF \| HTML	02 may 2023
	Application note	TI Space Rated Power Solution for Microsemi® RTG4™ FPGA (Rev. B)	PDF \| HTML	19 ene 2023
	Application note	Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A)	PDF \| HTML	17 nov 2022
	Application note	Single-Event Effects Confidence Interval Calculations (Rev. A)	PDF \| HTML	19 oct 2022
	EVM User's guide	TPS7H3301EVM-CVAL User's Guide (Rev. B)		30 oct 2020
	Application note	DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer		21 ago 2020
	Application note	DDR VTT Power Solutions: A Competitive Analysis (Rev. A)		09 jul 2020
	Application note	Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form	PDF \| HTML	18 may 2020
	E-book	Radiation Handbook for Electronics (Rev. A)		21 may 2019
	Application note	External Soft-Start Circuit for TPS7H3301-SP Power-Up Sequencing Applications		07 jul 2016
	Technical article	7 things to know about spacecraft subsystems before your next trip to Mars	PDF \| HTML	06 jul 2016

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

TPS7H3301EVM-CVAL — Módulo de evaluación TPS7H3301-SP para regulador LDO de terminación DDR

The TPS7H3301-SP source/sink double data rate (DDR) termination regulator is designed to support system needs for low-noise applications.

It is an ntegrated solution with reduced system solution size, improved efficiency and simple system design integration.

Guía del usuario: PDF

No disponible en TI.com

Kit de desarrollo

ALPHA-XILINX-KU060-SPACE — Placa Alpha Data® para Xilinx® Kintex® UltraScale™ XQRKU060 FPGA con potencia TI

This is a development kit for the Xilinx® XQRKU060 FPGA with industrial -1 speed grade. ADA-SDEV-KIT2 has a modular board design with a XRTC-compatible configuration module, two FMC connectors, DDR3 DRAM, system monitoring, and space-grade TI power management and temperature-sensing solutions.

Desde: Alpha Data Parallel Systems Ltd.

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