SN74ALS667

Name: SN74ALS667
Brand: TI
SKU: SN74ALS667
Price: 18.064 USD

アクティブ

3 ステート出力、オクタル D タイプ・トランスペアレント・リード・バック・ラッチ

ご注文はこちら

データシート

document-pdfAcrobat 8-Bit D-Type Transparent Read-Back Latches With 3-State Outputs データシート (Rev. A) (英語)

SN74ALS667

アクティブ

データシート

ご注文はこちら

製品詳細

Number of channels

8

Technology family

ALS

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

3-State

Clock frequency (max) (MHz)

75

IOL (max) (mA)

24

IOH (max) (mA)

-2.6

Supply current (max) (µA)

79000

Features

Flow-through pinout, High speed (tpd 10-50ns), Inverting output

Operating temperature range (°C)

0 to 70

Rating

Catalog

Number of channels

8

Technology family

ALS

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

3-State

Clock frequency (max) (MHz)

75

IOL (max) (mA)

24

IOH (max) (mA)

-2.6

Supply current (max) (µA)

79000

Features

Flow-through pinout, High speed (tpd 10-50ns), Inverting output

Operating temperature range (°C)

0 to 70

Rating

Catalog

SOIC (DW)

24

159.65 mm² 15.5 x 10.3

3-State I/O-Type Read-Back Inputs
Bus-Structured Pinout
Choice of True or Inverting Logic
- SN74ALS666...True Outputs
- SN74ALS667...Inverted Outputs
Preset and Clear Inputs
Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs

3-State I/O-Type Read-Back Inputs
Bus-Structured Pinout
Choice of True or Inverting Logic
- SN74ALS666...True Outputs
- SN74ALS667...Inverted Outputs
Preset and Clear Inputs
Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs

These 8-bit D-type transparent latches are designed specifically for storing the contents of the input data bus, plus reading back the stored data onto the input data bus. In addition, they provide a 3-state buffer-type output and are easily utilized in bus-structured applications.

While the latch enable (LE) is high, the Q outputs of the SN74ALS666 follow the data (D) inputs. The Q\ outputs of the SN74ALS667 provide the inverse of the data applied to its D inputs. The Q or Q\ output of both devices is in the high-impedance state if either output-enable (OE1\ or OE2\) input is at a high logic level.

Read back is provided through the read-back control (OERB\) input. When OERB\ is taken low, the data present at the output of the data latches passes back onto the input data bus. When OERB\ is taken high, the output of the data latches is isolated from the D inputs. OERB\ does not affect the internal operation of the latches; however, caution should be exercised to avoid a bus conflict.

The SN74ALS666 and SN74ALS667 are characterized for operation from 0°C to 70°C.

These 8-bit D-type transparent latches are designed specifically for storing the contents of the input data bus, plus reading back the stored data onto the input data bus. In addition, they provide a 3-state buffer-type output and are easily utilized in bus-structured applications.

While the latch enable (LE) is high, the Q outputs of the SN74ALS666 follow the data (D) inputs. The Q\ outputs of the SN74ALS667 provide the inverse of the data applied to its D inputs. The Q or Q\ output of both devices is in the high-impedance state if either output-enable (OE1\ or OE2\) input is at a high logic level.

Read back is provided through the read-back control (OERB\) input. When OERB\ is taken low, the data present at the output of the data latches passes back onto the input data bus. When OERB\ is taken high, the output of the data latches is isolated from the D inputs. OERB\ does not affect the internal operation of the latches; however, caution should be exercised to avoid a bus conflict.

The SN74ALS666 and SN74ALS667 are characterized for operation from 0°C to 70°C.

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