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Supply voltage (min) (V) 3 Supply voltage (max) (V) 5.5 Number of channels 16 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type CMOS Output type CMOS Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Technology family AC Rating Catalog Operating temperature range (°C) -40 to 85
Supply voltage (min) (V) 3 Supply voltage (max) (V) 5.5 Number of channels 16 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type CMOS Output type CMOS Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Technology family AC Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DL) 56 190.647 mm² 18.42 x 10.35
  • Members of the Texas Instruments Widebus TM Family
  • Independent Registers and Enables for A and B Buses
  • Multiplexed Real-Time and Stored Data
  • Flow-Through Architecture Optimizes PCB Layout
  • Distributed VCC and GND Pin Configurations Minimize High-Speed Switching Noise
  • EPIC TM (Enhanced-Performance Implanted CMOS) 1-m Process
  • 500-mA Typical Latch-Up Immunity at 125°C
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

 

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

  • Members of the Texas Instruments Widebus TM Family
  • Independent Registers and Enables for A and B Buses
  • Multiplexed Real-Time and Stored Data
  • Flow-Through Architecture Optimizes PCB Layout
  • Distributed VCC and GND Pin Configurations Minimize High-Speed Switching Noise
  • EPIC TM (Enhanced-Performance Implanted CMOS) 1-m Process
  • 500-mA Typical Latch-Up Immunity at 125°C
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

 

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

The 'AC16652 are 16-bit bus transceivers that consist of D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. They can be used as two 8-bit transceivers or one 16-bit transceiver.

Complementary output-enable (OEAB and ) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 'AC16652.

 

Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and . In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.

The 74AC16652 is packaged in TI's shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The 54AC16652 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74AC16652 is characterized for operation from -40°C to 85°C.

 

 

The data-output functions may be enabled or disabled by a variety of level combinations at OEAB or . Data-input functions are always enabled; i.e., data at the bus terminals is stored on every low-to-high transition on the clock inputs.

Select control = L; clocks can occur simultaneously.
Select control = H; clocks must be staggered in order to load both registers.


Figure 1. Bus-Management Functions

The 'AC16652 are 16-bit bus transceivers that consist of D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. They can be used as two 8-bit transceivers or one 16-bit transceiver.

Complementary output-enable (OEAB and ) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 'AC16652.

 

Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and . In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.

The 74AC16652 is packaged in TI's shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The 54AC16652 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74AC16652 is characterized for operation from -40°C to 85°C.

 

 

The data-output functions may be enabled or disabled by a variety of level combinations at OEAB or . Data-input functions are always enabled; i.e., data at the bus terminals is stored on every low-to-high transition on the clock inputs.

Select control = L; clocks can occur simultaneously.
Select control = H; clocks must be staggered in order to load both registers.


Figure 1. Bus-Management Functions

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능
SN74LVC16244A 활성 3상 출력을 지원하는 16채널, 1.65V~3.6V 버퍼 Smaller voltage range (1.65V to 3.6V), shorter propagation delay (5.5ns)

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
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13개 모두 보기
유형 직함 날짜
* Data sheet 16-Bit Bus Transceivers And Registers With 3-State Outputs datasheet (Rev. A) 1996/04/01
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021/07/26
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
More literature HiRel Unitrode Power Management Brochure 2009/07/07
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997/06/01
Application note Designing With Logic (Rev. C) 1997/06/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01
Application note Live Insertion 1996/10/01
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996/04/01

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

패키지 CAD 기호, 풋프린트 및 3D 모델
SSOP (DL) 56 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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