홈 로직 및 전압 변환 버퍼, 드라이버 및 트랜시버 비인버팅 버퍼 및 드라이버
홈
로직 및 전압 변환
버퍼, 드라이버 및 트랜시버
비인버팅 버퍼 및 드라이버

CD54HC4050

활성

군사용 6채널, 2V~6V 버퍼

지금 주문
데이터 시트

CD54HC4050

활성
데이터 시트 지금 주문

제품 상세 정보

Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 6 IOL (max) (mA) 4 Supply current (max) (µA) 20 IOH (max) (mA) -4 Input type Standard CMOS Output type Push-Pull Features Standard speed (tpd > 50ns) Rating Military Operating temperature range (°C) -55 to 125
Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 6 IOL (max) (mA) 4 Supply current (max) (µA) 20 IOH (max) (mA) -4 Input type Standard CMOS Output type Push-Pull Features Standard speed (tpd > 50ns) Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 16 135.3552 mm² 19.56 x 6.92
  • Typical Propagation Delay: 6ns at VCC = 5V, CL = 15pF, TA = 25°C
  • High-to-Low Voltage Level Converter for up to VI = 16V
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • Typical Propagation Delay: 6ns at VCC = 5V, CL = 15pF, TA = 25°C
  • High-to-Low Voltage Level Converter for up to VI = 16V
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

The ’HC4049 and ’HC4050 are fabricated with high-speed silicon gate technology. They have a modified input protection structure that enables these parts to be used as logic level translators which convert high-level logic to a low-level logic while operating off the low-level logic supply. For example, 15-V input pulse levels can be down-converted to 0-V to 5-V logic levels. The modified input protection structure protects the input from negative electrostatic discharge. These parts also can be used as simple buffers or inverters without level translation. The ’HC4049 and ’HC4050 are enhanced versions of equivalent CMOS types.

The ’HC4049 and ’HC4050 are fabricated with high-speed silicon gate technology. They have a modified input protection structure that enables these parts to be used as logic level translators which convert high-level logic to a low-level logic while operating off the low-level logic supply. For example, 15-V input pulse levels can be down-converted to 0-V to 5-V logic levels. The modified input protection structure protects the input from negative electrostatic discharge. These parts also can be used as simple buffers or inverters without level translation. The ’HC4049 and ’HC4050 are enhanced versions of equivalent CMOS types.
filter 기타 비인버팅 버퍼 및 드라이버 찾기
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기술 자료

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15개 모두 보기
유형 직함 날짜
* Data sheet CD54HC4049, CD74HC4049, CD54HC4050, CD74HC4050 datasheet (Rev. I) 2005/02/04
* SMD CD54HC4050 SMD 5962-86820 2016/06/21
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021/07/26
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
User guide Signal Switch Data Book (Rev. A) 2003/11/14
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997/06/01
Application note Designing With Logic (Rev. C) 1997/06/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01
Application note Live Insertion 1996/10/01
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 1996/05/01
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996/04/01

설계 및 개발

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CDIP (J) 16 Ultra Librarian
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주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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포럼 주제 모두 보기(영문)

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