제품 상세 정보

Technology family HCT Bits (#) 1 Rating Catalog Operating temperature range (°C) -55 to 125
Technology family HCT Bits (#) 1 Rating Catalog Operating temperature range (°C) -55 to 125
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6
  • Operating Frequency Range
    • Up to 18MHz (Typ) at VCC = 5V
    • Minimum Center Frequency of 12MHz at VCC = 4.5V
  • Choice of Three Phase Comparators
    • EXCLUSIVE-OR
    • Edge-Triggered JK Flip-Flop
    • Edge-Triggered RS Flip-Flop
  • Excellent VCO Frequency Linearity
  • VCO-Inhibit Control for ON/OFF Keying and for Low Standby Power Consumption
  • Minimal Frequency Drift
  • Operating Power Supply Voltage Range
    • VCO Section . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 6V
    • Digital Section . . . . . . . . . . . . . . . . . . . . . . . . 2V to 6V
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . -55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
  • Applications
    • FM Modulation and Demodulation
    • Frequency Synthesis and Multiplication
    • Frequency Discrimination
    • Tone Decoding
    • Data Synchronization and Conditioning
    • Voltage-to-Frequency Conversion
    • Motor-Speed Control
  • Operating Frequency Range
    • Up to 18MHz (Typ) at VCC = 5V
    • Minimum Center Frequency of 12MHz at VCC = 4.5V
  • Choice of Three Phase Comparators
    • EXCLUSIVE-OR
    • Edge-Triggered JK Flip-Flop
    • Edge-Triggered RS Flip-Flop
  • Excellent VCO Frequency Linearity
  • VCO-Inhibit Control for ON/OFF Keying and for Low Standby Power Consumption
  • Minimal Frequency Drift
  • Operating Power Supply Voltage Range
    • VCO Section . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 6V
    • Digital Section . . . . . . . . . . . . . . . . . . . . . . . . 2V to 6V
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . -55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
  • Applications
    • FM Modulation and Demodulation
    • Frequency Synthesis and Multiplication
    • Frequency Discrimination
    • Tone Decoding
    • Data Synchronization and Conditioning
    • Voltage-to-Frequency Conversion
    • Motor-Speed Control

The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7.

The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator.

The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.

The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the "4000B" series. They are specified in compliance with JEDEC standard number 7.

The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator.

The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.

다운로드

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
1개 모두 보기
유형 직함 날짜
* Data sheet CD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A datasheet (Rev. J) 2003/11/21

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​