비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
CY74FCT16827T
- Ioff Supports Partial-Power-Down Mode Operation
- Edge-rate control circuitry for significantly improved noise characteristics
- Typical output skew < 250 ps
- ESD > 2000V
- TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages
- Industrial temperature range of -40°C to +85°C
- VCC = 5V ± 10%
- CY74FCT16827T Features:
- 64 mA sink current, 32 mA source current
- Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25°C
- CY74FCT162827T Features:
- Balanced 24 mA output drivers
- Reduced system switching noise
- Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA = 25°C
The CY74FCT16827T 20-bit buffer/line driver and the CY74FCT162827T 20-bit buffer/line driver provide high-performance bus interface buffering for wide data/address paths or buses carrying parity. These parts can be used as a single 20-bit buffer or two 10-bit buffers. Each 10-bit buffer has a pair of NANDed OE\ for increased flexibility.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The CY74FCT16827T is ideally suited for driving high-capacitance loads and low-impedance backplanes.
The CY74FCT162827T has 24-mA balanced output drivers with current-limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162827T is ideal for driving transmission lines.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | 20-Bit Buffers/Line Drivers datasheet (Rev. B) | 2001/09/13 |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치