SN54AS244A
- 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
- pnp Inputs Reduce dc Loading
- Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
These octal buffers and line drivers are designed specifically to
improve the performance and density of 3-state memory address
drivers, clock drivers, and bus-oriented receivers and transmitters.
With the ´ALS240A, ´ALS241C, ´AS240A, and
´AS241A, these devices provide the choice of selected
combinations of inverting outputs, symmetrical active-low
output-enable () inputs, and
complementary OE and
inputs.
The -1 version of SN74ALS244C is identical to the standard version, except that the recommended maximum IOL for the -1 version is 48 mA. There is no -1 version of the SN54ALS244C.
The SN54ALS244C and SN54AS244A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS244C and SN74AS244A are characterized for operation from 0°C to 70°C.
관심 가지실만한 유사 제품
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | Octal Buffers And Line Drivers With 3-State Outputs datasheet (Rev. C) | 1995/08/01 | |
* | SMD | SN54AS244A SMD 5962-97559 | 2016/06/21 | |
Selection guide | Logic Guide (Rev. AB) | 2017/06/12 | ||
Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015/12/02 | ||
User guide | LOGIC Pocket Data Book (Rev. B) | 2007/01/16 | ||
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004/07/08 | ||
Application note | TI IBIS File Creation, Validation, and Distribution Processes | 2002/08/29 | ||
Application note | Designing With Logic (Rev. C) | 1997/06/01 | ||
Application note | Advanced Schottky Load Management | 1997/02/01 | ||
Application note | Input and Output Characteristics of Digital Integrated Circuits | 1996/10/01 | ||
Application note | Live Insertion | 1996/10/01 | ||
Application note | Advanced Schottky (ALS and AS) Logic Families | 1995/08/01 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
CDIP (J) | 20 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치