SN54BCT244
- State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
- P-N-P Inputs Reduce DC Loading
- ESD Protection Exceeds 2000 V
Per MIL-STD-883C, Method 3015 - 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
- Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic and Ceramic 300-mil DIPs (J, N)
These octal buffers and line drivers are designed specifically to
improve both the performance and density of 3-state memory address
drivers, clock drivers, and bus-oriented receivers and transmitters.
Taken together with the ´BCT240 and ´BCT241, these devices
provide the choice of selected combinations of inverting and
noninverting outputs, symmetrical 
(active-low output-enable) inputs, and complementary OE
and inputs.
The ´BCT244 is organized as two 4-bit buffers/line drivers
with separate output-enable () inputs. When is
low, the device passes data from the A inputs to the Y outputs. When
is high, the
outputs are in the high-impedance state.
The SN54BCT244 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT244 is characterized for operation from 0°C to 70°C.
관심 가지실만한 유사 제품
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | Octal Buffers/Drivers With 3-State Outputs datasheet (Rev. E) | 1994/04/01 | |
| * | SMD | SN54BCT244 SMD 5962-90625 | 2016/06/21 | |
| Application note | Implications of Slow or Floating CMOS Inputs (Rev. E) | 2021/07/26 | ||
| Selection guide | Logic Guide (Rev. AB) | 2017/06/12 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015/12/02 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 2007/01/16 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004/07/08 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 2002/08/29 | ||
| Application note | Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) | 1997/08/01 | ||
| Application note | Designing With Logic (Rev. C) | 1997/06/01 | ||
| Application note | Input and Output Characteristics of Digital Integrated Circuits | 1996/10/01 | ||
| Application note | Live Insertion | 1996/10/01 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| CDIP (J) | 20 | Ultra Librarian |
| CFP (W) | 20 | Ultra Librarian |
| LCCC (FK) | 20 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치