SN54BCT623
- State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
- ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015
- Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Plastic and Ceramic 300-mil DIPs (J, N)
The ´BCT623 bus transceiver is designed for asynchronous communication between data buses. The control function implementation allows for maximum flexibility in timing. The ´BCT623 provides true data at its outputs.
This device allows data transmission from the A bus to the B bus
or from the B bus to the A bus depending upon the logic levels at the
output-enable (OEAB and 
)
inputs.
The output-enable inputs can be used to disable the device so that
the buses are effectively isolated. The dual-enable configuration
gives the transceivers the capability of storing data by
simultaneously enabling OEAB and . Each output reinforces its input in this
configuration. When both OEAB and are enabled and all other data sources to the two sets
of bus lines are at high impedance, both sets of bus lines (16 in
all) will remain at their last states.
The SN54BCT623 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT623 is characterized for operation from 0°C to 70°C.
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | Octal Bus Transceivers With 3-State Outputs datasheet (Rev. A) | 1993/11/01 | |
| * | SMD | SN54BCT623 SMD 5962-90940 | 2016/06/21 | |
| Application note | Implications of Slow or Floating CMOS Inputs (Rev. E) | 2021/07/26 | ||
| Selection guide | Logic Guide (Rev. AB) | 2017/06/12 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015/12/02 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 2007/01/16 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004/07/08 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 2002/08/29 | ||
| Application note | Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) | 1997/08/01 | ||
| Application note | Designing With Logic (Rev. C) | 1997/06/01 | ||
| Application note | Input and Output Characteristics of Digital Integrated Circuits | 1996/10/01 | ||
| Application note | Live Insertion | 1996/10/01 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| CDIP (J) | 20 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치