SN54F240

활성

3상 출력을 지원하는 군사용 8채널, 4.5V~5.5V 양극 인버터

제품 상세 정보

Technology family F Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) -15 Supply current (max) (µA) 75000 Input type Bipolar Output type 3-State Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Military Operating temperature range (°C) -55 to 125
Technology family F Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) -15 Supply current (max) (µA) 75000 Input type Bipolar Output type 3-State Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 20 167.464 mm² 24.2 x 6.92 CFP (W) 20 90.5828 mm² 13.09 x 6.92 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Package Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Package Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the ´F241 and ´F244, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical (active-low output-enable) inputs, and complementary OE and inputs.

The ´F240 is organized as two 4-bit buffers/line drivers with separate output enable () inputs. When is low, the device passes data from the A inputs to the Y outputs. When is high, the outputs are in the high-impedance state.

The SN74F240 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54F240 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F240 is characterized for operation from 0°C to 70°C.

 

 

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the ´F241 and ´F244, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical (active-low output-enable) inputs, and complementary OE and inputs.

The ´F240 is organized as two 4-bit buffers/line drivers with separate output enable () inputs. When is low, the device passes data from the A inputs to the Y outputs. When is high, the outputs are in the high-impedance state.

The SN74F240 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54F240 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F240 is characterized for operation from 0°C to 70°C.

 

 

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기술 자료

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10개 모두 보기
유형 직함 날짜
* Data sheet Octal Buffers/Drivers With 3-State Outputs datasheet (Rev. A) 1993/10/01
* SMD SN54F240 SMD 5962-97585 2016/06/21
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 1997/08/01
Application note Designing With Logic (Rev. C) 1997/06/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

패키지 CAD 기호, 풋프린트 및 3D 모델
CDIP (J) 20 Ultra Librarian
CFP (W) 20 Ultra Librarian
LCCC (FK) 20 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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