패키징 정보
| 패키지 | 핀 SOIC (D) | 14 |
| 작동 온도 범위(°C) -40 to 125 |
| 패키지 수량 | 캐리어 50 | TUBE |
SN74AHCT125의 주요 특징
- Inputs are TTL-voltage compatible
- Latch-up performance exceeds 250mA per JESD 17
SN74AHCT125에 대한 설명
The ’AHCT125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output.
For the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.