제품 상세 정보

Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -15 Input type TTL Output type TTL Features High speed (tpd 10-50ns), Over-voltage tolerant inputs Technology family ALS Rating Catalog Operating temperature range (°C) 0 to 70
Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -15 Input type TTL Output type TTL Features High speed (tpd 10-50ns), Over-voltage tolerant inputs Technology family ALS Rating Catalog Operating temperature range (°C) 0 to 70
PDIP (N) 20 228.702 mm² 24.33 x 9.4 SOIC (DW) 20 131.84 mm² 12.8 x 10.3
  • Local Bus-Latch Capability
  • Choice of True or Inverting Logic
  • Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (N) 300-mil DIPs

 

 

  • Local Bus-Latch Capability
  • Choice of True or Inverting Logic
  • Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (N) 300-mil DIPs

 

 

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.

These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and ) inputs.

The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and . Each output reinforces its input in this transceiver configuration. When both OEAB and are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.

The -1 versions of the SN74ALS620A and SN74ALS621A are identical to the standard versions, except that the recommended maximum IOL is increased to 48 mA in the -1 versions.

The SN74ALS620A, SN74ALS621A, SN74ALS623A, and SN74AS623 are characterized for operation from 0°C to 70°C.

 

 

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.

These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and ) inputs.

The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and . Each output reinforces its input in this transceiver configuration. When both OEAB and are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.

The -1 versions of the SN74ALS620A and SN74ALS621A are identical to the standard versions, except that the recommended maximum IOL is increased to 48 mA in the -1 versions.

The SN74ALS620A, SN74ALS621A, SN74ALS623A, and SN74AS623 are characterized for operation from 0°C to 70°C.

 

 

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
CD74ACT623 활성 3상 출력을 지원하는 8진 비인버팅 버스 트랜시버 Higher average drive strength (24mA)
비교 대상 장치와 유사한 기능
SN74AHCT245 활성 3상 출력을 지원하는 8진 버스 트랜시버 Voltage range (4.5V to 5.5V), average drive strength (8mA), average propagation delay (9ns)

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
11개 모두 보기
유형 직함 날짜
* Data sheet Octal Bus Transceivers datasheet (Rev. A) 1995/01/01
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 1997/08/01
Application note Designing With Logic (Rev. C) 1997/06/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01
Application note Live Insertion 1996/10/01
Application note Advanced Schottky (ALS and AS) Logic Families 1995/08/01

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

14-24-LOGIC-EVM — 14핀~24핀 D, DB, DGV, DW, DYY, NS 및 PW 패키지용 로직 제품 일반 평가 모듈

14-24-LOGIC-EVM 평가 모듈(EVM)은 14핀~24핀 D, DW, DB, NS, PW, DYY 또는 DGV 패키지에 있는 모든 로직 장치를 지원하도록 설계되었습니다.

사용 설명서: PDF | HTML
TI.com에서 구매 불가
패키지 CAD 기호, 풋프린트 및 3D 모델
PDIP (N) 20 Ultra Librarian
SOIC (DW) 20 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상